diff options
| author | Bo Shen <voice.shen@gmail.com> | 2017-10-02 22:47:59 -0700 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-10-08 16:19:56 -0400 |
| commit | 72dee54b4e75894ef521ae282be00edd7284d1e0 (patch) | |
| tree | e5c0a0da6472c586f404e0d41ea223d3fdee4b74 /arch | |
| parent | af609e3764ea3ed7c0ccad8e57f9d9671c81c3e8 (diff) | |
ARM: stm32f7: fix prescaler calculation of timer
As the timer 2 is on APB1 bus, the maximum of clock frequency of APB1 timer
clock is half of SYSCLK. Then to calculate the timer prescaler for timer 2
which need to be divided by 2.
Signed-off-by: Bo Shen <voice.shen@gmail.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-stm32/stm32f7/timer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-stm32/stm32f7/timer.c b/arch/arm/mach-stm32/stm32f7/timer.c index c15f8bbe32..b04c1013e9 100644 --- a/arch/arm/mach-stm32/stm32f7/timer.c +++ b/arch/arm/mach-stm32/stm32f7/timer.c @@ -26,7 +26,7 @@ int timer_init(void) /* Stop the timer */ writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1); - writel((CONFIG_SYS_CLK_FREQ/CONFIG_SYS_HZ_CLOCK) - 1, + writel((CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ_CLOCK) - 1, &gpt1_regs_ptr->psc); /* Configure timer for auto-reload */ |