diff options
| author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2018-01-16 20:44:28 +0300 |
|---|---|---|
| committer | Alexey Brodkin <abrodkin@synopsys.com> | 2018-01-19 17:59:35 +0300 |
| commit | 7897f4e54cefe9525344bec419dae230e4ff9913 (patch) | |
| tree | c41da9e2268890a41aad1dc373166795332bb9c9 /arch | |
| parent | 320c8a1a860e91983955b9d69014324a1c1c0ad8 (diff) | |
ARC: HSDK: DTS: Add cgu-clk node
Add cgu-clk (clock generation unit) node to HSDK device tree.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arc/dts/hsdk.dts | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts index a7b276c01e..67dfb93ca8 100644 --- a/arch/arc/dts/hsdk.dts +++ b/arch/arc/dts/hsdk.dts @@ -24,6 +24,12 @@ }; }; + cgu_clk: cgu-clk@f0000000 { + compatible = "snps,hsdk-cgu-clock"; + reg = <0xf0000000 0x10>, <0xf00014B8 0x4>; + #clock-cells = <1>; + }; + uart0: serial0@f0005000 { compatible = "snps,dw-apb-uart"; reg = <0xf0005000 0x1000>; |