diff options
| author | Frieder Schrempf <frieder.schrempf@kontron.de> | 2019-12-11 10:01:19 +0000 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2020-01-07 10:26:57 +0100 |
| commit | 83083febf55679ee0fc68ba55e9af43add277b58 (patch) | |
| tree | b2495a3ed95c2ec411c67de34cccb125f4dbd2ba /arch | |
| parent | 162c72c80445636ec73f8833b9e91f0128d21b8f (diff) | |
ddr: imx8m: Return error values from LPDDR4 training
In cases when the same SPL should run on boards with i.MX8MM, that
differ in DDR configuration, it is necessary to try different
parameters and check if the training done by the firmware suceeds or
not.
Therefore we return the DDR training/initialization success to the
upper layer in order to be able to retry with different settings if
necessary.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-imx8m/ddr.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-imx8m/ddr.h b/arch/arm/include/asm/arch-imx8m/ddr.h index 53d46256d8..7a2a2d8edc 100644 --- a/arch/arm/include/asm/arch-imx8m/ddr.h +++ b/arch/arm/include/asm/arch-imx8m/ddr.h @@ -703,14 +703,14 @@ struct dram_timing_info { extern struct dram_timing_info dram_timing; void ddr_load_train_firmware(enum fw_type type); -void ddr_init(struct dram_timing_info *timing_info); -void ddr_cfg_phy(struct dram_timing_info *timing_info); +int ddr_init(struct dram_timing_info *timing_info); +int ddr_cfg_phy(struct dram_timing_info *timing_info); void load_lpddr4_phy_pie(void); void ddrphy_trained_csr_save(struct dram_cfg_param *param, unsigned int num); void dram_config_save(struct dram_timing_info *info, unsigned long base); /* utils function for ddr phy training */ -void wait_ddrphy_training_complete(void); +int wait_ddrphy_training_complete(void); void ddrphy_init_set_dfi_clk(unsigned int drate); void ddrphy_init_read_msg_block(enum fw_type type); |