diff options
author | Tom Rini <trini@konsulko.com> | 2020-02-20 22:14:29 -0500 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2020-02-20 22:14:29 -0500 |
commit | 8e51bf746a11d7f67416859da73a83109af4e0a3 (patch) | |
tree | 95351fb3819745d39c60944412e66529b31170bd /arch | |
parent | 4246fae418f213d13ddd1829367183e94b5a7942 (diff) | |
parent | f9561d8e3671415c7780df4b5e70f0f1e2d2bf57 (diff) |
Merge tag 'u-boot-rockchip-20200220' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- rk3399: split roc-pc-rk3399 out of evb_rk3399
- sync dts from upstream kernel for rk3399,rk3288,px30
- boot_mode: find the saradc device name
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/px30.dtsi | 182 | ||||
-rw-r--r-- | arch/arm/dts/rk3288-vyasa.dts | 79 | ||||
-rw-r--r-- | arch/arm/dts/rk3399-evb.dts | 4 | ||||
-rw-r--r-- | arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/dts/rk3399-puma-ddr1333.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/dts/rk3399-puma-ddr1600.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/dts/rk3399-puma-ddr1866.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/rk3399-puma-u-boot.dtsi | 24 | ||||
-rw-r--r-- | arch/arm/dts/rk3399-puma.dtsi | 23 | ||||
-rw-r--r-- | arch/arm/dts/rk3399-u-boot.dtsi | 55 | ||||
-rw-r--r-- | arch/arm/dts/rk3399.dtsi | 38 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/boot_mode.c | 22 | ||||
-rwxr-xr-x | arch/arm/mach-rockchip/make_fit_atf.py | 2 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3399/Kconfig | 42 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/spl.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/tpl.c | 7 |
19 files changed, 350 insertions, 149 deletions
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi index 0d2325a77f..b6c79e7ed3 100644 --- a/arch/arm/dts/px30.dtsi +++ b/arch/arm/dts/px30.dtsi @@ -10,6 +10,7 @@ #include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/power/px30-power.h> #include <dt-bindings/soc/rockchip,boot-mode.h> +#include <dt-bindings/thermal/thermal.h> / { compatible = "rockchip,px30"; @@ -113,16 +114,11 @@ compatible = "operating-points-v2"; opp-shared; - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <950000 950000 1350000>; - clock-latency-ns = <40000>; - opp-suspend; - }; opp-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <950000 950000 1350000>; clock-latency-ns = <40000>; + opp-suspend; }; opp-816000000 { opp-hz = /bits/ 64 <816000000>; @@ -186,6 +182,55 @@ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + thermal_zones: thermal-zones { + soc_thermal: soc-thermal { + polling-delay-passive = <20>; + polling-delay = <1000>; + sustainable-power = <750>; + thermal-sensors = <&tsadc 0>; + + trips { + threshold: trip-point-0 { + temperature = <70000>; + hysteresis = <2000>; + type = "passive"; + }; + + target: trip-point-1 { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + soc_crit: soc-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <4096>; + }; + + map1 { + trip = <&target>; + cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <4096>; + }; + }; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <100>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + thermal-sensors = <&tsadc 1>; + }; + }; + xin24m: xin24m { compatible = "fixed-clock"; #clock-cells = <0>; @@ -370,6 +415,36 @@ compatible = "rockchip,px30-io-voltage-domain"; status = "disabled"; }; + + lvds: lvds { + compatible = "rockchip,px30-lvds"; + phys = <&dsi_dphy>; + phy-names = "dphy"; + rockchip,grf = <&grf>; + rockchip,output = "lvds"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + lvds_vopb_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_lvds>; + }; + + lvds_vopl_in: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_lvds>; + }; + }; + }; + }; }; uart1: serial@ff158000 { @@ -650,6 +725,26 @@ }; }; + tsadc: tsadc@ff280000 { + compatible = "rockchip,px30-tsadc"; + reg = <0x0 0xff280000 0x0 0x100>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + assigned-clocks = <&cru SCLK_TSADC>; + assigned-clock-rates = <50000>; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + rockchip,grf = <&grf>; + rockchip,hw-tshut-temp = <120000>; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&tsadc_otp_gpio>; + pinctrl-1 = <&tsadc_otp_out>; + pinctrl-2 = <&tsadc_otp_gpio>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; + saradc: saradc@ff288000 { compatible = "rockchip,px30-saradc", "rockchip,rk3399-saradc"; reg = <0x0 0xff288000 0x0 0x100>; @@ -706,12 +801,48 @@ #reset-cells = <1>; }; + usb2phy_grf: syscon@ff2c0000 { + compatible = "rockchip,px30-usb2phy-grf", "syscon", + "simple-mfd"; + reg = <0x0 0xff2c0000 0x0 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + + u2phy: usb2-phy@100 { + compatible = "rockchip,px30-usb2phy"; + reg = <0x100 0x20>; + clocks = <&pmucru SCLK_USBPHY_REF>; + clock-names = "phyclk"; + #clock-cells = <0>; + assigned-clocks = <&cru USB480M>; + assigned-clock-parents = <&u2phy>; + clock-output-names = "usb480m_phy"; + status = "disabled"; + + u2phy_host: host-port { + #phy-cells = <0>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "linestate"; + status = "disabled"; + }; + + u2phy_otg: otg-port { + #phy-cells = <0>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "otg-bvalid", "otg-id", + "linestate"; + status = "disabled"; + }; + }; + }; + dsi_dphy: phy@ff2e0000 { compatible = "rockchip,px30-dsi-dphy"; reg = <0x0 0xff2e0000 0x0 0x10000>; clocks = <&pmucru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>; clock-names = "ref", "pclk"; - #clock-cells = <0>; resets = <&cru SRST_MIPIDSIPHY_P>; reset-names = "apb"; #phy-cells = <0>; @@ -731,6 +862,8 @@ g-rx-fifo-size = <280>; g-tx-fifo-size = <256 128 128 64 32 16>; g-use-dma; + phys = <&u2phy_otg>; + phy-names = "usb2-phy"; power-domains = <&power PX30_PD_USB>; status = "disabled"; }; @@ -741,6 +874,8 @@ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru HCLK_HOST>; clock-names = "usbhost"; + phys = <&u2phy_host>; + phy-names = "usb"; power-domains = <&power PX30_PD_USB>; status = "disabled"; }; @@ -751,6 +886,8 @@ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru HCLK_HOST>; clock-names = "usbhost"; + phys = <&u2phy_host>; + phy-names = "usb"; power-domains = <&power PX30_PD_USB>; status = "disabled"; }; @@ -823,17 +960,30 @@ status = "disabled"; }; + gpu: gpu@ff400000 { + compatible = "rockchip,px30-mali", "arm,mali-bifrost"; + reg = <0x0 0xff400000 0x0 0x4000>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&cru SCLK_GPU>; + #cooling-cells = <2>; + power-domains = <&power PX30_PD_GPU>; + status = "disabled"; + }; + dsi: dsi@ff450000 { compatible = "rockchip,px30-mipi-dsi"; reg = <0x0 0xff450000 0x0 0x10000>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_MIPI_DSI>, <&dsi_dphy>; - clock-names = "pclk", "pll"; - resets = <&cru SRST_MIPIDSI_HOST_P>; - reset-names = "apb"; + clocks = <&cru PCLK_MIPI_DSI>; + clock-names = "pclk"; phys = <&dsi_dphy>; phy-names = "dphy"; power-domains = <&power PX30_PD_VO>; + resets = <&cru SRST_MIPIDSI_HOST_P>; + reset-names = "apb"; rockchip,grf = <&grf>; #address-cells = <1>; #size-cells = <0>; @@ -883,6 +1033,11 @@ reg = <0>; remote-endpoint = <&dsi_in_vopb>; }; + + vopb_out_lvds: endpoint@1 { + reg = <1>; + remote-endpoint = <&lvds_vopb_in>; + }; }; }; @@ -920,6 +1075,11 @@ reg = <0>; remote-endpoint = <&dsi_in_vopl>; }; + + vopl_out_lvds: endpoint@1 { + reg = <1>; + remote-endpoint = <&lvds_vopl_in>; + }; }; }; diff --git a/arch/arm/dts/rk3288-vyasa.dts b/arch/arm/dts/rk3288-vyasa.dts index 850aa25818..4193f7208c 100644 --- a/arch/arm/dts/rk3288-vyasa.dts +++ b/arch/arm/dts/rk3288-vyasa.dts @@ -1,43 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2017 Jagan Teki <jagan@amarulasolutions.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; @@ -115,6 +78,17 @@ vin-supply = <&vcc_io>; }; + vcc50_hdmi: vcc50-hdmi { + compatible = "regulator-fixed"; + regulator-name = "vcc50_hdmi"; + enable-active-high; + gpio = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>; /* HDMI_EN */ + pinctrl-names = "default"; + pinctrl-0 = <&vcc50_hdmi_en>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vsus_5v>; + }; vusb1_5v: vusb1-5v { compatible = "regulator-fixed"; regulator-name = "vusb1_5v"; @@ -158,7 +132,6 @@ &emmc { bus-width = <8>; cap-mmc-highspeed; - disable-wp; non-removable; pinctrl-names = "default"; pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; @@ -188,7 +161,7 @@ }; &hdmi { - ddc-i2c-bus = <&i2c2>; + ddc-i2c-bus = <&i2c5>; status = "okay"; }; @@ -324,15 +297,15 @@ }; }; - vcc10_lcd: LDO_REG6 { - regulator-name = "vcc10_lcd"; + vdd10_lcd: LDO_REG6 { + regulator-name = "vdd10_lcd"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; regulator-boot-on; regulator-state-mem { regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; + regulator-suspend-microvolt = <1000000>; }; }; @@ -385,7 +358,7 @@ }; }; -&i2c2 { +&i2c5 { status = "okay"; }; @@ -402,6 +375,12 @@ status = "okay"; }; +&tsadc { + rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ + status = "okay"; +}; + &uart2 { status = "okay"; }; @@ -463,15 +442,21 @@ }; }; + hdmi { + vcc50_hdmi_en: vcc50-hdmi-en { + rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pmic { pmic_int: pmic-int { - rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; }; }; usb_host { phy_pwr_en: phy-pwr-en { - rockchip,pins = <RK_GPIO2 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>; + rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>; }; usb2_pwr_en: usb2-pwr-en { @@ -481,7 +466,7 @@ usb_otg { otg_vbus_drv: otg-vbus-drv { - rockchip,pins = <RK_GPIO0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts index 8e887f3a17..4129e902a8 100644 --- a/arch/arm/dts/rk3399-evb.dts +++ b/arch/arm/dts/rk3399-evb.dts @@ -176,7 +176,7 @@ status = "okay"; }; -&dwc3_typec0 { +&usbdrd3_0 { vbus-supply = <&vcc5v0_typec0>; status = "okay"; }; @@ -189,7 +189,7 @@ status = "okay"; }; -&dwc3_typec1 { +&usbdrd3_1 { vbus-supply = <&vcc5v0_typec1>; status = "okay"; }; diff --git a/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi new file mode 100644 index 0000000000..39d3927f49 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-puma-u-boot.dtsi" +#include "rk3399-sdram-ddr3-1333.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1333.dts b/arch/arm/dts/rk3399-puma-ddr1333.dts index 8f1193cbe6..80f27699f4 100644 --- a/arch/arm/dts/rk3399-puma-ddr1333.dts +++ b/arch/arm/dts/rk3399-puma-ddr1333.dts @@ -6,5 +6,3 @@ /dts-v1/; #include "rk3399-puma.dtsi" -#include "rk3399-sdram-ddr3-1333.dtsi" - diff --git a/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi new file mode 100644 index 0000000000..be58311dc4 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-puma-u-boot.dtsi" +#include "rk3399-sdram-ddr3-1600.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1600.dts b/arch/arm/dts/rk3399-puma-ddr1600.dts index 42763f82d0..cb76b0165c 100644 --- a/arch/arm/dts/rk3399-puma-ddr1600.dts +++ b/arch/arm/dts/rk3399-puma-ddr1600.dts @@ -7,5 +7,3 @@ #include "rk3399-puma.dtsi" #include "rk3399-u-boot.dtsi" -#include "rk3399-sdram-ddr3-1600.dtsi" - diff --git a/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi new file mode 100644 index 0000000000..48da076329 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-puma-u-boot.dtsi" +#include "rk3399-sdram-ddr3-1866.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1866.dts b/arch/arm/dts/rk3399-puma-ddr1866.dts index bb86a448fa..80f27699f4 100644 --- a/arch/arm/dts/rk3399-puma-ddr1866.dts +++ b/arch/arm/dts/rk3399-puma-ddr1866.dts @@ -6,5 +6,3 @@ /dts-v1/; #include "rk3399-puma.dtsi" -#include "rk3399-sdram-ddr3-1866.dtsi" - diff --git a/arch/arm/dts/rk3399-puma-u-boot.dtsi b/arch/arm/dts/rk3399-puma-u-boot.dtsi new file mode 100644 index 0000000000..52f62b5d39 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-u-boot.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-u-boot.dtsi" +/ { + config { + u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ + u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ + u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ + u-boot,boot-led = "module_led"; + sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + u-boot,spl-boot-order = \ + "same-as-spl", &spiflash, &sdhci, &sdmmc; + }; + + aliases { + spi0 = &spi1; + spi1 = &spi5; + }; + +}; diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index 74368da550..558b6337df 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -10,25 +10,6 @@ model = "Theobroma Systems RK3399-Q7 SoM"; compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399"; - config { - u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ - u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ - u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ - u-boot,boot-led = "module_led"; - sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - u-boot,spl-boot-order = \ - "same-as-spl", &spiflash, &sdhci, &sdmmc; - }; - - aliases { - spi0 = &spi1; - spi1 = &spi5; - }; - leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -518,7 +499,7 @@ status = "disabled"; }; -&dwc3_typec0 { +&usbdrd3_0 { status = "okay"; }; @@ -530,7 +511,7 @@ status = "disabled"; }; -&dwc3_typec1 { +&usbdrd3_1 { status = "okay"; tsd,usb-port-power = "usbhub_enable"; }; diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index 40240bbfc2..8b857ccfc7 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -2,19 +2,58 @@ /* * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com> */ +#define USB_CLASS_HUB 9 + +/ { + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; + + cic: syscon@ff620000 { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-cic", "syscon"; + reg = <0x0 0xff620000 0x0 0x100>; + }; + + dfi: dfi@ff630000 { + u-boot,dm-pre-reloc; + reg = <0x00 0xff630000 0x00 0x4000>; + compatible = "rockchip,rk3399-dfi"; + rockchip,pmu = <&pmugrf>; + clocks = <&cru PCLK_DDR_MON>; + clock-names = "pclk_ddr_mon"; + }; + + dmc: dmc { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-dmc"; + devfreq-events = <&dfi>; + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru SCLK_DDRCLK>; + clock-names = "dmc_clk"; + reg = <0x0 0xffa80000 0x0 0x0800 + 0x0 0xffa80800 0x0 0x1800 + 0x0 0xffa82000 0x0 0x2000 + 0x0 0xffa84000 0x0 0x1000 + 0x0 0xffa88000 0x0 0x0800 + 0x0 0xffa88800 0x0 0x1800 + 0x0 0xffa8a000 0x0 0x2000 + 0x0 0xffa8c000 0x0 0x1000>; + }; + + pmusgrf: syscon@ff330000 { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-pmusgrf", "syscon"; + reg = <0x0 0xff330000 0x0 0xe3d4>; + }; -&cic { - u-boot,dm-pre-reloc; }; &cru { u-boot,dm-pre-reloc; }; -&dmc { - u-boot,dm-pre-reloc; -}; - &grf { u-boot,dm-pre-reloc; }; @@ -39,10 +78,6 @@ u-boot,dm-pre-reloc; }; -&pmusgrf { - u-boot,dm-pre-reloc; -}; - &sdhci { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi index 3f773b10f4..6b7c136ab8 100644 --- a/arch/arm/dts/rk3399.dtsi +++ b/arch/arm/dts/rk3399.dtsi @@ -10,7 +10,6 @@ #include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/power/rk3399-power.h> #include <dt-bindings/thermal/thermal.h> -#define USB_CLASS_HUB 9 / { compatible = "rockchip,rk3399"; @@ -34,8 +33,6 @@ serial2 = &uart2; serial3 = &uart3; serial4 = &uart4; - mmc0 = &sdhci; - mmc1 = &sdmmc; }; cpus { @@ -1080,11 +1077,6 @@ }; }; - pmusgrf: syscon@ff330000 { - compatible = "rockchip,rk3399-pmusgrf", "syscon"; - reg = <0x0 0xff330000 0x0 0xe3d4>; - }; - spi3: spi@ff350000 { compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi"; reg = <0x0 0xff350000 0x0 0x1000>; @@ -1200,36 +1192,6 @@ status = "disabled"; }; - cic: syscon@ff620000 { - compatible = "rockchip,rk3399-cic", "syscon"; - reg = <0x0 0xff620000 0x0 0x100>; - }; - - dfi: dfi@ff630000 { - reg = <0x00 0xff630000 0x00 0x4000>; - compatible = "rockchip,rk3399-dfi"; - rockchip,pmu = <&pmugrf>; - clocks = <&cru PCLK_DDR_MON>; - clock-names = "pclk_ddr_mon"; - status = "disabled"; - }; - - dmc: dmc { - compatible = "rockchip,rk3399-dmc"; - devfreq-events = <&dfi>; - interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&cru SCLK_DDRCLK>; - clock-names = "dmc_clk"; - reg = <0x0 0xffa80000 0x0 0x0800 - 0x0 0xffa80800 0x0 0x1800 - 0x0 0xffa82000 0x0 0x2000 - 0x0 0xffa84000 0x0 0x1000 - 0x0 0xffa88000 0x0 0x0800 - 0x0 0xffa88800 0x0 0x1800 - 0x0 0xffa8a000 0x0 0x2000 - 0x0 0xffa8c000 0x0 0x1000>; - }; - efuse0: efuse@ff690000 { compatible = "rockchip,rk3399-efuse"; reg = <0x0 0xff690000 0x0 0x80>; diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 2f260a5c5f..ed7514ab75 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -102,6 +102,7 @@ config ROCKCHIP_RK3288 select SUPPORT_SPL select SPL select SUPPORT_TPL + imply PRE_CONSOLE_BUFFER imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_CLK diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c index 08f80bd91a..7598fe4c43 100644 --- a/arch/arm/mach-rockchip/boot_mode.c +++ b/arch/arm/mach-rockchip/boot_mode.c @@ -7,6 +7,8 @@ #include <adc.h> #include <asm/io.h> #include <asm/arch-rockchip/boot_mode.h> +#include <dm/device.h> +#include <dm/uclass.h> #if (CONFIG_ROCKCHIP_BOOT_MODE_REG == 0) @@ -35,8 +37,26 @@ void set_back_to_bootrom_dnl_flag(void) __weak int rockchip_dnl_key_pressed(void) { unsigned int val; + struct udevice *dev; + struct uclass *uc; + int ret; - if (adc_channel_single_shot("saradc", 1, &val)) { + ret = uclass_get(UCLASS_ADC, &uc); + if (ret) + return false; + + ret = -ENODEV; + uclass_foreach_dev(dev, uc) { + if (!strncmp(dev->name, "saradc", 6)) { + ret = adc_channel_single_shot(dev->name, 1, &val); + break; + } + } + + if (ret == -ENODEV) { + pr_warn("%s: no saradc device found\n", __func__); + return false; + } else if (ret) { pr_err("%s: adc_channel_single_shot fail!\n", __func__); return false; } diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py index c79317d6c5..d15c32b303 100755 --- a/arch/arm/mach-rockchip/make_fit_atf.py +++ b/arch/arm/mach-rockchip/make_fit_atf.py @@ -107,7 +107,7 @@ def append_conf_section(file, cnt, dtname, segments): file.write(';\n') if segments <= 1: file.write(';\n') - file.write('\t\t\tfdt = "fdt_1";\n') + file.write('\t\t\tfdt = "fdt_%d";\n' % cnt) file.write('\t\t};\n') file.write('\n') diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index f994152803..927bb62a9f 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -3,6 +3,15 @@ if ROCKCHIP_RK3399 choice prompt "RK3399 board select" +config TARGET_CHROMEBOOK_BOB + bool "Asus Flip C101PA Chromebook (RK3399)" + help + Bob is a small RK3299-based device similar in apperance to Minnie. + It has two USB 3.0 type-C ports, 4GB of SDRAM, WiFi and a 10.1", + 1280x800 display. It uses its USB ports for both power and external + display. It includes a Chrome OS EC (Cortex-M3) to provide access to + the keyboard and battery functions. + config TARGET_EVB_RK3399 bool "RK3399 evaluation board" help @@ -53,15 +62,6 @@ config TARGET_ROCK960_RK3399 * 2x USB 3.0 type A, 2x USB 2.0 type A (host mode only), 1x USB 3.0 type C OTG -config TARGET_CHROMEBOOK_BOB - bool "Asus Flip C101PA Chromebook (RK3399)" - help - Bob is a small RK3299-based device similar in apperance to Minnie. - It has two USB 3.0 type-C ports, 4GB of SDRAM, WiFi and a 10.1", - 1280x800 display. It uses its USB ports for both power and external - display. It includes a Chrome OS EC (Cortex-M3) to provide access to - the keyboard and battery functions. - config TARGET_ROCKPRO64_RK3399 bool "Pine64 Rockpro64 board" help @@ -81,6 +81,25 @@ config TARGET_ROCKPRO64_RK3399 * GPIO expansion ports * DC 12V/2A +config TARGET_ROC_PC_RK3399 + bool "Firefly ROC-RK3399-PC board" + help + ROC-RK3399-PC is SBC produced by Firefly. Key features: + + * Rockchip RK3399 + * 4GB Dual-Channel LPDDR4 64-bit + * SD card slot + * eMMC socket + * 16MB SPI Flash + * Gigabit ethernet + * PCIe + * HDMI In/Out, DP, MIPI DSI/CSI, eDP + * USB 3.0, 2.0 + * USB Type C power and data + * GPIO expansion ports + * wide voltage input(5V-15V), dual cell battery + * Wifi/BT accessible via expansion board M.2 + endchoice config ROCKCHIP_BOOT_MODE_REG @@ -123,10 +142,11 @@ config SYS_BOOTCOUNT_ADDR endif # BOOTCOUNT_LIMIT +source "board/firefly/roc-pc-rk3399/Kconfig" +source "board/google/gru/Kconfig" +source "board/pine64/rockpro64_rk3399/Kconfig" source "board/rockchip/evb_rk3399/Kconfig" source "board/theobroma-systems/puma_rk3399/Kconfig" source "board/vamrs/rock960_rk3399/Kconfig" -source "board/google/gru/Kconfig" -source "board/pine64/rockpro64_rk3399/Kconfig" endif diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index 7d0e6fa1af..48ab0e60c6 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -147,7 +147,7 @@ void board_init_f(ulong dummy) } #ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) +int __weak board_fit_config_name_match(const char *name) { /* Just empty function now - can't decide what to choose */ debug("%s: %s\n", __func__, name); diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 31a3eb4c28..a2b8d31cbd 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -40,11 +40,18 @@ __weak void rockchip_stimer_init(void) TIMER_CONTROL_REG); } +__weak int board_early_init_f(void) +{ + return 0; +} + void board_init_f(ulong dummy) { struct udevice *dev; int ret; + board_early_init_f(); + #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT) /* * Debug UART can be used from here if required: |