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authorMarek Vasut <marek.vasut+renesas@gmail.com>2017-07-29 21:28:34 +0200
committerMarek Vasut <marex@denx.de>2018-04-17 11:38:55 +0200
commit93365eff6096e14be2ae3f7190baf819a20bf99f (patch)
tree948c824949ae8492259ad72e21e098bc12b86b1c /arch
parent8c0a17be0a632b9a823e14628c42f85c3e64f08e (diff)
ARM: rmobile: Add Renesas RPC HF/QSPI DT nodes
Add device tree nodes for the Renesas RPC HF/QSPI controller. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/r8a7795.dtsi8
-rw-r--r--arch/arm/dts/r8a7796.dtsi8
-rw-r--r--arch/arm/dts/r8a77965.dtsi8
-rw-r--r--arch/arm/dts/r8a77970.dtsi8
-rw-r--r--arch/arm/dts/r8a77995.dtsi8
5 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/dts/r8a7795.dtsi b/arch/arm/dts/r8a7795.dtsi
index f7dc147317..31df1f62aa 100644
--- a/arch/arm/dts/r8a7795.dtsi
+++ b/arch/arm/dts/r8a7795.dtsi
@@ -1525,6 +1525,14 @@
dma-channels = <2>;
};
+ rpc: rpc@0xee200000 {
+ compatible = "renesas,rpc-r8a7795", "renesas,rpc";
+ reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
+ clocks = <&cpg CPG_MOD 917>;
+ bank-width = <2>;
+ status = "disabled";
+ };
+
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7795";
reg = <0 0xee100000 0 0x2000>;
diff --git a/arch/arm/dts/r8a7796.dtsi b/arch/arm/dts/r8a7796.dtsi
index 83faabe040..7cb14bb65f 100644
--- a/arch/arm/dts/r8a7796.dtsi
+++ b/arch/arm/dts/r8a7796.dtsi
@@ -1350,6 +1350,14 @@
status = "disabled";
};
+ rpc: rpc@0xee200000 {
+ compatible = "renesas,rpc-r8a7796", "renesas,rpc";
+ reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
+ clocks = <&cpg CPG_MOD 917>;
+ bank-width = <2>;
+ status = "disabled";
+ };
+
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7796";
reg = <0 0xee100000 0 0x2000>;
diff --git a/arch/arm/dts/r8a77965.dtsi b/arch/arm/dts/r8a77965.dtsi
index 7eb4e65ea4..3630b52a92 100644
--- a/arch/arm/dts/r8a77965.dtsi
+++ b/arch/arm/dts/r8a77965.dtsi
@@ -748,6 +748,14 @@
status = "disabled";
};
+ rpc: rpc@0xee200000 {
+ compatible = "renesas,rpc-r8a77965", "renesas,rpc";
+ reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
+ clocks = <&cpg CPG_MOD 917>;
+ bank-width = <2>;
+ status = "disabled";
+ };
+
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee100000 0 0x2000>;
diff --git a/arch/arm/dts/r8a77970.dtsi b/arch/arm/dts/r8a77970.dtsi
index 78e6f89e30..42c5c72bf2 100644
--- a/arch/arm/dts/r8a77970.dtsi
+++ b/arch/arm/dts/r8a77970.dtsi
@@ -381,5 +381,13 @@
#address-cells = <1>;
#size-cells = <0>;
};
+
+ rpc: rpc@0xee200000 {
+ compatible = "renesas,rpc-r8a77970", "renesas,rpc";
+ reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
+ clocks = <&cpg CPG_MOD 917>;
+ bank-width = <2>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm/dts/r8a77995.dtsi b/arch/arm/dts/r8a77995.dtsi
index d1a03cf811..733b6afc89 100644
--- a/arch/arm/dts/r8a77995.dtsi
+++ b/arch/arm/dts/r8a77995.dtsi
@@ -400,5 +400,13 @@
#phy-cells = <0>;
status = "disabled";
};
+
+ rpc: rpc@0xee200000 {
+ compatible = "renesas,rpc-r8a77995", "renesas,rpc";
+ reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
+ clocks = <&cpg CPG_MOD 917>;
+ bank-width = <2>;
+ status = "disabled";
+ };
};
};