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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2020-07-28 12:56:26 +0300
committerBin Meng <bmeng.cn@gmail.com>2020-08-03 10:46:56 +0800
commit940185910f9821226c673d3ee5535afab31b9865 (patch)
tree33c7af4b2c65dd9215d51de5815884bb8e310f3a /arch
parent549c6f47e67546e1fee87c0bae2ab84af9a9a693 (diff)
x86: call32: Append appropriate suffixes
Assembler is not happy: arch/x86/cpu/call32.S: Assembler messages: arch/x86/cpu/call32.S:36: Warning: no instruction mnemonic suffix given and no register operands; using default for `retf' Fix this by adding appropriate suffixes to the assembler commands. Fixes: 6f92ed8f1abf ("x86: Add a way to call 32-bit code from 64-bit mode") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/cpu/call32.S5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/x86/cpu/call32.S b/arch/x86/cpu/call32.S
index e185b9a42b..e641e781c0 100644
--- a/arch/x86/cpu/call32.S
+++ b/arch/x86/cpu/call32.S
@@ -32,8 +32,7 @@ cpu_call32:
push %rdi /* 32-bit code segment */
lea compat(%rip), %rax
push %rax
- .byte 0x48 /* REX prefix to force 64-bit far return */
- retf
+ retfq
.code32
compat:
/*
@@ -60,4 +59,4 @@ compat:
/* Jump to the required target */
pushl %edi /* 32-bit code segment */
pushl %esi /* 32-bit target address */
- retf
+ retfl