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authorPeter Crosthwaite <crosthwaitepeter@gmail.com>2014-08-28 21:16:39 +1000
committerMichal Simek <michal.simek@xilinx.com>2014-11-11 11:02:07 +0100
commit9757b65befff800303f053d95d49b167a0d159a2 (patch)
tree5e566170229207049451ce212aee2f54a1bbd173 /arch
parent290f1f999a42fd08f3483722a61e2d9e0901eb17 (diff)
arm: dts: zynq: Add digilent ZYBO board dts
It's a Zynq board similar in design to the currently supported ones. 512MB of RAM and UART1 is used. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/zynq-zybo.dts23
2 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 52f8926894..8977d4b5ae 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -34,6 +34,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \
zynq-zc706.dtb \
zynq-zed.dtb \
+ zynq-zybo.dtb \
zynq-microzed.dtb \
zynq-zc770-xm010.dtb \
zynq-zc770-xm012.dtb \
diff --git a/arch/arm/dts/zynq-zybo.dts b/arch/arm/dts/zynq-zybo.dts
new file mode 100644
index 0000000000..20e0386777
--- /dev/null
+++ b/arch/arm/dts/zynq-zybo.dts
@@ -0,0 +1,23 @@
+/*
+ * Digilent ZYBO board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+
+/ {
+ model = "Zynq ZYBO Board";
+ compatible = "xlnx,zynq-zybo", "xlnx,zynq-7000";
+
+ aliases {
+ serial0 = &uart1;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0x20000000>;
+ };
+};