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authorTom Rini <trini@konsulko.com>2018-03-20 18:39:27 -0400
committerTom Rini <trini@konsulko.com>2018-03-20 18:39:27 -0400
commit9c0e2f6ed391f199ba1bf30c7d0b71123a012958 (patch)
tree125e5816f8b9f8f3502d57f5f7df1272e223de3f /arch
parentda773532cde226b5456b89096a1be446887c7a3e (diff)
parent3386c73d46fa4624a6bec00f304261f9fe814299 (diff)
Merge git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/fsl-ls1088a-qds.dts37
-rw-r--r--arch/arm/dts/fsl-ls1088a.dtsi5
2 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/dts/fsl-ls1088a-qds.dts b/arch/arm/dts/fsl-ls1088a-qds.dts
index 225c7c53c7..02000fcba8 100644
--- a/arch/arm/dts/fsl-ls1088a-qds.dts
+++ b/arch/arm/dts/fsl-ls1088a-qds.dts
@@ -19,6 +19,43 @@
};
};
+&ifc {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ /* NOR, NAND Flashes and FPGA on board */
+ ranges = <0 0 0x5 0x80000000 0x08000000
+ 2 0 0x5 0x30000000 0x00010000
+ 3 0 0x5 0x20000000 0x00010000>;
+ status = "okay";
+
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand@2,0 {
+ compatible = "fsl,ifc-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x1 0x0 0x10000>;
+ };
+
+ fpga: board-control@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus", "fsl,ls1088aqds-fpga",
+ "fsl,fpga-qixis";
+ reg = <0x2 0x0 0x0000100>;
+ bank-width = <1>;
+ device-width = <1>;
+ ranges = <0 2 0 0x100>;
+ };
+};
+
&dspi {
bus-num = <0>;
status = "okay";
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index f8f8654e15..b4a42cf5d0 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -75,6 +75,11 @@
reg-names = "QuadSPI", "QuadSPI-memory";
num-cs = <4>;
};
+ ifc: ifc@1530000 {
+ compatible = "fsl,ifc", "simple-bus";
+ reg = <0x0 0x2240000 0x0 0x20000>;
+ interrupts = <0 21 0x4>; /* Level high type */
+ };
usb0: usb3@3100000 {
compatible = "fsl,layerscape-dwc3";