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authorAnton Schubert <anton.schubert@gmx.de>2015-08-11 11:54:01 +0200
committerLuka Perkov <luka.perkov@sartura.hr>2015-08-17 18:49:43 +0200
commit9c28d61c8e65f2b1cf2db1ba262fe37e973beaa7 (patch)
tree06cf9514e2ea956af5692f3ed625c43804cb0fda /arch
parent0ceb2dae788848ad6df9fb1cc0e20e632f380887 (diff)
pci: mvebu: Add PCIe driver
This adds a PCI driver for the controllers found on Marvell MVEBU SoCs. Besides the driver, this patch also removes the statically defined PCI MBUS windows. As they are not needed anymore, since this PCIe driver now creates the windows dynamically. Tested on Armada XP db-mv784mp-gp eval board using an Intel E1000 PCIe card in all 3 PCIe slots. And on the Armada 38x db-88f6820-gp eval board using this Intel E1000 PCIe card in the PCIe 0 slot. This port was done in cooperation with Anton Schubert. Signed-off-by: Anton Schubert <anton.schubert@gmx.de> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mvebu/cpu.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 1c5f4c3da3..ea83e21d43 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -18,14 +18,6 @@
#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3))
static struct mbus_win windows[] = {
- /* PCIE MEM address space */
- { MBUS_PCI_MEM_BASE, MBUS_PCI_MEM_SIZE,
- CPU_TARGET_PCIE13, CPU_ATTR_PCIE_MEM },
-
- /* PCIE IO address space */
- { MBUS_PCI_IO_BASE, MBUS_PCI_IO_SIZE,
- CPU_TARGET_PCIE13, CPU_ATTR_PCIE_IO },
-
/* SPI */
{ MBUS_SPI_BASE, MBUS_SPI_SIZE,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_SPIFLASH },