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authorKonstantin Porotchkin <kostap@marvell.com>2017-04-05 18:22:31 +0300
committerStefan Roese <sr@denx.de>2017-05-09 13:38:18 +0200
commita2cb55938fd9bd00dddcd0991d67fd1dd9e05ad5 (patch)
tree86144e7512f570e839400d008357a497a321d14f /arch
parentf4f194e864e879896e630594448b31cc672a4934 (diff)
arm64: mvebu: a8k: Add support for NAND clock get
Implement mvebu_get_nand_clock call for A8K family. This function is used by PXA3XX NAND driver. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mvebu/armada8k/cpu.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c b/arch/arm/mach-mvebu/armada8k/cpu.c
index 2325e9a180..38e7d33cb3 100644
--- a/arch/arm/mach-mvebu/armada8k/cpu.c
+++ b/arch/arm/mach-mvebu/armada8k/cpu.c
@@ -110,3 +110,21 @@ void reset_cpu(ulong ignored)
reg &= ~(1 << RFU_SW_RESET_OFFSET);
writel(reg, RFU_GLOBAL_SW_RST);
}
+
+/*
+ * TODO - implement this functionality using platform
+ * clock driver once it gets available
+ * Return NAND clock in Hz
+ */
+u32 mvebu_get_nand_clock(void)
+{
+ unsigned long NAND_FLASH_CLK_CTRL = 0xF2440700UL;
+ unsigned long NF_CLOCK_SEL_MASK = 0x1;
+ u32 reg;
+
+ reg = readl(NAND_FLASH_CLK_CTRL);
+ if (reg & NF_CLOCK_SEL_MASK)
+ return 400 * 1000000;
+ else
+ return 250 * 1000000;
+}