diff options
author | Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> | 2018-01-11 20:03:31 +0530 |
---|---|---|
committer | York Sun <york.sun@nxp.com> | 2018-01-15 11:56:33 -0800 |
commit | b0ce187b1f8dfa30e3885caa7dca8c1742def973 (patch) | |
tree | 1e0f2df6a4e61d819be8dac5ba212f6947ca8cdd /arch | |
parent | bdc48ec61e03b4b09cfdd3a5afe0992601402cd9 (diff) |
board: ls1012a: LS1012A-2G5RDB board support
LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII
PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART.
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/Kconfig | 12 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/dts/fsl-ls1012a-2g5rdb.dts | 43 |
4 files changed, 57 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 001ece3cf1..9dc542625e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -968,6 +968,18 @@ config TARGET_LS1012ARDB development platform that supports the QorIQ LS1012A Layerscape Architecture processor. +config TARGET_LS1012A2G5RDB + bool "Support ls1012a2g5rdb" + select ARCH_LS1012A + select ARM64 + select BOARD_LATE_INIT + imply SCSI + help + Support for Freescale LS1012A2G5RDB platform. + The LS1012A 2G5 Reference design board (RDB) is a high-performance + development platform that supports the QorIQ LS1012A + Layerscape Architecture processor. + config TARGET_LS1012AFRDM bool "Support ls1012afrdm" select ARCH_LS1012A diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 51f48e15d7..3a0e129d2e 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -90,7 +90,7 @@ config PSCI_RESET !TARGET_LS2080ARDB && !TARGET_LS2080A_EMU && \ !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \ !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ - !TARGET_LS1012AQDS && \ + !TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS2081ARDB && \ diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index bbc4f476d0..11d6f17d1a 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -209,6 +209,7 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1046a-rdb.dtb \ fsl-ls1012a-qds.dtb \ fsl-ls1012a-rdb.dtb \ + fsl-ls1012a-2g5rdb.dtb \ fsl-ls1012a-frdm.dtb dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb diff --git a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts new file mode 100644 index 0000000000..dbe01dd7f6 --- /dev/null +++ b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts @@ -0,0 +1,43 @@ +/* + * NXP ls1012a 2G5RDB board device tree source + * + * Copyright 2017 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +#include "fsl-ls1012a.dtsi" + +/ { + model = "LS1012A 2G5RDB Board"; + + aliases { + spi0 = &qspi; + }; + + chosen { + stdout-path = &duart0; + }; +}; + +&qspi { + bus-num = <0>; + status = "okay"; + + qflash0: s25fl128s@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + +&i2c0 { + status = "okay"; +}; + +&duart0 { + status = "okay"; +}; |