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authorSriram Dash <sriram.dash@nxp.com>2018-03-26 14:22:43 +0530
committerYork Sun <york.sun@nxp.com>2018-05-09 09:17:51 -0500
commitbda33d3c6c27b2579f4efdc0ef1d98560314c89d (patch)
tree4874223318799ff8be8b37b82308d53288615692 /arch
parentf195fad178979020b226671cafec9f9592860174 (diff)
armv8: layerscape: Avoid code duplication for TZASC Instantiation
TZASC controller configurations are similar. Put them in a macro and avoid code duplication. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S62
1 files changed, 34 insertions, 28 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index e9d373e464..ef3987ea84 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -233,39 +233,45 @@ ENTRY(lowlevel_init)
* NOTE: As per the CCSR map doc, TZASC 3 and TZASC 4 are just
* placeholders.
*/
-#ifdef CONFIG_FSL_TZASC_1
- ldr x1, =TZASC_GATE_KEEPER(0)
- ldr w0, [x1] /* Filter 0 Gate Keeper Register */
- orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
- str w0, [x1]
- ldr x1, =TZASC_REGION_ATTRIBUTES_0(0)
- ldr w0, [x1] /* Region-0 Attributes Register */
- orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */
- orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */
- str w0, [x1]
+.macro tzasc_prog, xreg
+
+ mov x12, TZASC1_BASE
+ mov x16, #0x10000
+ mul x14, \xreg, x16
+ add x14, x14,x12
+ mov x1, #0x8
+ add x1, x1, x14
+
+ ldr w0, [x1] /* Filter 0 Gate Keeper Register */
+ orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
+ str w0, [x1]
+
+ mov x1, #0x110
+ add x1, x1, x14
+
+ ldr w0, [x1] /* Region-0 Attributes Register */
+ orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */
+ orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */
+ str w0, [x1]
+
+ mov x1, #0x114
+ add x1, x1, x14
+
+ ldr w0, [x1] /* Region-0 Access Register */
+ mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
+ str w0, [x1]
+.endm
+
+#ifdef CONFIG_FSL_TZASC_1
+ mov x13, #0
+ tzasc_prog x13
- ldr x1, =TZASC_REGION_ID_ACCESS_0(0)
- ldr w0, [x1] /* Region-0 Access Register */
- mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
- str w0, [x1]
#endif
#ifdef CONFIG_FSL_TZASC_2
- ldr x1, =TZASC_GATE_KEEPER(1)
- ldr w0, [x1] /* Filter 0 Gate Keeper Register */
- orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
- str w0, [x1]
-
- ldr x1, =TZASC_REGION_ATTRIBUTES_0(1)
- ldr w0, [x1] /* Region-1 Attributes Register */
- orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */
- orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */
- str w0, [x1]
+ mov x13, #1
+ tzasc_prog x13
- ldr x1, =TZASC_REGION_ID_ACCESS_0(1)
- ldr w0, [x1] /* Region-1 Attributes Register */
- mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
- str w0, [x1]
#endif
isb
dsb sy