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authorMarek Vasut <marex@denx.de>2015-08-03 15:32:37 +0200
committerMarek Vasut <marex@denx.de>2015-08-23 11:56:19 +0200
commitc2624240dd9321b0fd86dba5ecf75d7a73974796 (patch)
tree19740cbb6f43a23c733bdbc10b313c39e8b5f5c3 /arch
parentafe139938a75402a4287634c4d46b25e07cf79c0 (diff)
arm: socfpga: Do not enable gmac1 in Cyclone V dtsi
The GMAC which is enabled is purely board property, so do not enable arbitrary GMAC in DT include files. Same goes for PHY mode, which is again a board property. The CycloneV SoCDK does this correctly, but SoCrates doesn't. This bug never manifested itself though, since all the boards ever used the GMAC1 . This bug manifests itself only on boards that utilise GMAC0. Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/socfpga_cyclone5.dtsi6
-rw-r--r--arch/arm/dts/socfpga_cyclone5_socrates.dts1
2 files changed, 1 insertions, 6 deletions
diff --git a/arch/arm/dts/socfpga_cyclone5.dtsi b/arch/arm/dts/socfpga_cyclone5.dtsi
index 234a901205..de362099db 100644
--- a/arch/arm/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/dts/socfpga_cyclone5.dtsi
@@ -27,12 +27,6 @@
cap-sd-highspeed;
};
- ethernet@ff702000 {
- phy-mode = "rgmii";
- phy-addr = <0xffffffff>; /* probe for phy addr */
- status = "okay";
- };
-
sysmgr@ffd08000 {
cpu1-start-addr = <0xffd080c4>;
};
diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index 3c985584d1..6782691f73 100644
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -23,6 +23,7 @@
&gmac1 {
status = "okay";
+ phy-mode = "rgmii";
};
&i2c0 {