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authorPunnaiah Choudary Kalluri <punnaiah.choudary.kalluri@xilinx.com>2016-02-03 15:27:18 +0530
committerMichal Simek <michal.simek@xilinx.com>2016-04-13 18:29:01 +0200
commitc9132b1e4489b394a87555d17c059b4d681ed0cf (patch)
treec22021d1db559c8e491c439993af5a5443ae0e5a /arch
parent936bbc5d161923283135dcc84e6af1fcd31f848a (diff)
ARM: zynq: DT: Add ethernet phy reset information
Added phy reset gpio information for gem0. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/zynq-zc702.dts2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts
index eba7037dab..ee050aa12f 100644
--- a/arch/arm/dts/zynq-zc702.dts
+++ b/arch/arm/dts/zynq-zc702.dts
@@ -91,6 +91,8 @@
phy-handle = <&ethernet_phy>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gem0_default>;
+ phy-reset-gpio = <&gpio0 11 0>;
+ phy-reset-active-low;
ethernet_phy: ethernet-phy@7 {
reg = <7>;