diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-01-28 06:53:44 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-01-29 20:59:08 +0900 |
| commit | c995f3a3c5263c2e424064fac81f169846b6d25e (patch) | |
| tree | 4eb8cde4272fa09a7d0b1e29a572c57e50fefb1b /arch | |
| parent | 3e9952be23e1fdc8b576dfeed80e442d3045cd87 (diff) | |
ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC
For LD20 SoC, the last 64 byte of each DRAM bank is used for the
dynamic training of DRAM PHY. The regions must be reserved in DT to
prevent the kernel from using them. Now gd->bd->bi_dram reflects
the actual memory banks. Just use it instead of getting access to
the board parameters.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-uniphier/dram_init.c | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index b78ca72013..881062d9b6 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -248,22 +248,15 @@ void dram_init_banksize(void) */ int ft_board_setup(void *fdt, bd_t *bd) { - const struct uniphier_board_data *param; unsigned long rsv_addr; const unsigned long rsv_size = 64; - int ch, ret; + int i, ret; if (uniphier_get_soc_id() != UNIPHIER_LD20_ID) return 0; - param = uniphier_get_board_param(); - if (!param) { - printf("failed to get board parameter\n"); - return -ENODEV; - } - - for (ch = 0; ch < param->dram_nr_ch; ch++) { - rsv_addr = param->dram_ch[ch].base + param->dram_ch[ch].size; + for (i = 0; i < ARRAY_SIZE(gd->bd->bi_dram); i++) { + rsv_addr = gd->bd->bi_dram[i].start + gd->bd->bi_dram[i].size; rsv_addr -= rsv_size; ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size); |