diff options
| author | Tang Yuantian <yuantian.tang@freescale.com> | 2014-07-23 17:27:53 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-08-12 12:26:47 -0700 |
| commit | ce249d956c820af4b9790406461b1748741d0478 (patch) | |
| tree | beec4264c4b3e826cd9e5fc6c6639c209d0fccba /arch | |
| parent | 3067547502873281b19e01c7bc25da63c9b42b1e (diff) | |
powerpc/t104xrdb: support deep sleep in SPI/SD boot
Add deep sleep support in SPI/SD boot. The destination address
second stage uboot image is loaded to is changed because
currently this address will be used by kernel which means
we can't reserve it for resume.
Entry point to kernel is still placed in second stage uboot.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/fdt.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 3665ec6b6c..3222e26a5a 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -134,6 +134,21 @@ void ft_fixup_cpu(void *blob, u64 memory_limit) printf("Failed to reserve memory for spin table: %s\n", fdt_strerror(off)); } +#ifdef CONFIG_DEEP_SLEEP +#ifdef CONFIG_SPL_MMC_BOOT + off = fdt_add_mem_rsv(blob, CONFIG_SYS_MMC_U_BOOT_START, + CONFIG_SYS_MMC_U_BOOT_SIZE); + if (off < 0) + printf("Failed to reserve memory for SD deep sleep: %s\n", + fdt_strerror(off)); +#elif defined(CONFIG_SPL_SPI_BOOT) + off = fdt_add_mem_rsv(blob, CONFIG_SYS_SPI_FLASH_U_BOOT_START, + CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE); + if (off < 0) + printf("Failed to reserve memory for SPI deep sleep: %s\n", + fdt_strerror(off)); +#endif +#endif } #endif |