diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-24 21:14:03 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-26 00:37:13 +0900 |
| commit | d7e103c08f5bb29d8126eaef3b7b6d6bafacea80 (patch) | |
| tree | 8dc422045200877886a0d70955cd807280911721 /arch | |
| parent | ae932cf67e457a9a937a8913f2c2cf2b13b68833 (diff) | |
ARM: uniphier: add EHCI nodes for PH1-LD11
Make the USB feature really available.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/uniphier-ph1-ld11-ref.dts | 12 | ||||
| -rw-r--r-- | arch/arm/dts/uniphier-ph1-ld11.dtsi | 36 |
2 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/dts/uniphier-ph1-ld11-ref.dts b/arch/arm/dts/uniphier-ph1-ld11-ref.dts index 88e7f53ed5..b148e9fbd9 100644 --- a/arch/arm/dts/uniphier-ph1-ld11-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld11-ref.dts @@ -49,6 +49,18 @@ status = "okay"; }; +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; + /* for U-Boot only */ / { soc { diff --git a/arch/arm/dts/uniphier-ph1-ld11.dtsi b/arch/arm/dts/uniphier-ph1-ld11.dtsi index 7d498cebe9..e485f90a97 100644 --- a/arch/arm/dts/uniphier-ph1-ld11.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld11.dtsi @@ -190,6 +190,42 @@ reg = <0x59801000 0x400>; }; + usb0: usb@5a800100 { + compatible = "socionext,uniphier-ehci", "generic-ehci"; + status = "disabled"; + reg = <0x5a800100 0x100>; + interrupts = <0 243 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0>; + clocks = <&mio 3>, <&mio 6>; + }; + + usb1: usb@5a810100 { + compatible = "socionext,uniphier-ehci", "generic-ehci"; + status = "disabled"; + reg = <0x5a810100 0x100>; + interrupts = <0 244 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1>; + clocks = <&mio 4>, <&mio 6>; + }; + + usb2: usb@5a820100 { + compatible = "socionext,uniphier-ehci", "generic-ehci"; + status = "disabled"; + reg = <0x5a820100 0x100>; + interrupts = <0 245 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2>; + clocks = <&mio 5>, <&mio 6>; + }; + + mio: mioctrl@5b3e0000 { + compatible = "socionext,ph1-ld11-mioctrl"; + reg = <0x5b3e0000 0x800>; + #clock-cells = <1>; + }; + pinctrl: pinctrl@5f801000 { compatible = "socionext,ph1-ld11-pinctrl", "syscon"; reg = <0x5f801000 0xe00>; |