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authorTom Rini <trini@konsulko.com>2020-02-07 19:04:23 -0500
committerTom Rini <trini@konsulko.com>2020-02-07 19:04:23 -0500
commite1dff2d69e5a21a61c3eb28e5d230a6d48749b6c (patch)
treead59579dca2cf8f166390d0a65bca7ea7b7610cb /arch
parent96ff825d31ae9a1410600f002731047c3c2de8b1 (diff)
parent7d706a886fdd99e76a1123a8fefbe060fd11bebb (diff)
Merge branch '2020-02-07-master-imports'
- 2 FAT fixes. - MediaTek ethernet support improvement. - Initial Cortina Access CAxxxx family support. - Correct return value of do_gpio() and so gpio shell command.
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig5
-rw-r--r--arch/arm/dts/Makefile2
-rw-r--r--arch/arm/dts/ca-presidio-engboard.dts69
-rw-r--r--arch/arm/dts/mt7622-rfb.dts13
-rw-r--r--arch/arm/dts/mt7622.dtsi45
-rw-r--r--arch/arm/include/asm/gpio.h4
-rw-r--r--arch/arm/mach-cortina/Makefile5
-rw-r--r--arch/powerpc/cpu/mpc8xx/traps.c2
8 files changed, 142 insertions, 3 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ada164d4bd..8d9f7fcce7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1675,6 +1675,10 @@ config TARGET_DURIAN
Support for durian platform.
It has 2GB Sdram, uart and pcie.
+config TARGET_PRESIDIO_ASIC
+ bool "Support Cortina Presidio ASIC Platform"
+ select ARM64
+
endchoice
config ARCH_SUPPORT_TFABOOT
@@ -1823,6 +1827,7 @@ source "board/Marvell/gplugd/Kconfig"
source "board/armadeus/apf27/Kconfig"
source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
+source "board/cortina/presidio-asic/Kconfig"
source "board/broadcom/bcm23550_w1d/Kconfig"
source "board/broadcom/bcm28155_ap/Kconfig"
source "board/broadcom/bcm963158/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9303beb2f5..6915783d9c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -909,6 +909,8 @@ dtb-$(CONFIG_TARGET_VEXPRESS_CA15_TC2) += vexpress-v2p-ca15_a7.dtb
dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
+dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
+
targets += $(dtb-y)
# Add any required device tree compiler flags here
diff --git a/arch/arm/dts/ca-presidio-engboard.dts b/arch/arm/dts/ca-presidio-engboard.dts
new file mode 100644
index 0000000000..c03dacc54a
--- /dev/null
+++ b/arch/arm/dts/ca-presidio-engboard.dts
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020, Cortina Access Inc.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ mmc0: mmc@f4400000 {
+ compatible = "snps,dw-cortina";
+ reg = <0x0 0xf4400000 0x1000>;
+ bus-width = <4>;
+ io_ds = <0x77>;
+ fifo-mode;
+ sd_dll_ctrl = <0xf43200e8>;
+ io_drv_ctrl = <0xf432004c>;
+ };
+
+ gpio0: gpio-controller@0xf4329280 {
+ compatible = "cortina,ca-gpio";
+ reg = <0x0 0xf4329280 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ status = "okay";
+ };
+ gpio1: gpio-controller@0xf43292a4 {
+ compatible = "cortina,ca-gpio";
+ reg = <0x0 0xf43292a4 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ status = "disabled";
+ };
+
+ watchdog: watchdog@0xf432901c {
+ compatible = "cortina,ca-wdt";
+ reg = <0x0 0xf432901c 0x34>,
+ <0x0 0xf4320020 0x04>;
+ status = "okay";
+ };
+
+ uart0: serial@0xf4329148 {
+ u-boot,dm-pre-reloc;
+ compatible = "cortina,ca-uart";
+ reg = <0x0 0xf4329148 0x30>;
+ status = "okay";
+ };
+
+ i2c: i2c@f4329120 {
+ compatible = "cortina,ca-i2c";
+ reg = <0x0 0xf4329120 0x28>;
+ clock-frequency = <400000>;
+ };
+
+ sflash: sflash-controller@f4324000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "cortina,ca-sflash";
+ reg = <0x0 0xf4324000 0x50>;
+ reg-names = "sflash-regs";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-rx-bus-width = <1>;
+ spi-max-frequency = <108000000>;
+ };
+ };
+};
diff --git a/arch/arm/dts/mt7622-rfb.dts b/arch/arm/dts/mt7622-rfb.dts
index ec30f5c6eb..f05c3fe14d 100644
--- a/arch/arm/dts/mt7622-rfb.dts
+++ b/arch/arm/dts/mt7622-rfb.dts
@@ -178,3 +178,16 @@
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};
+
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "sgmii";
+ mediatek,switch = "mt7531";
+ reset-gpios = <&gpio 54 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
diff --git a/arch/arm/dts/mt7622.dtsi b/arch/arm/dts/mt7622.dtsi
index 7dcca5c6af..1e8ec9b48b 100644
--- a/arch/arm/dts/mt7622.dtsi
+++ b/arch/arm/dts/mt7622.dtsi
@@ -7,6 +7,9 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/mt7622-clk.h>
+#include <dt-bindings/power/mt7629-power.h>
+#include <dt-bindings/reset/mt7629-reset.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "mediatek,mt7622";
@@ -182,4 +185,46 @@
clock-names = "source", "hclk";
status = "disabled";
};
+
+ ethsys: syscon@1b000000 {
+ compatible = "mediatek,mt7622-ethsys", "syscon";
+ reg = <0x1b000000 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ eth: ethernet@1b100000 {
+ compatible = "mediatek,mt7622-eth", "syscon";
+ reg = <0x1b100000 0x20000>;
+ clocks = <&topckgen CLK_TOP_ETH_SEL>,
+ <&ethsys CLK_ETH_ESW_EN>,
+ <&ethsys CLK_ETH_GP0_EN>,
+ <&ethsys CLK_ETH_GP1_EN>,
+ <&ethsys CLK_ETH_GP2_EN>,
+ <&sgmiisys CLK_SGMII_TX250M_EN>,
+ <&sgmiisys CLK_SGMII_RX250M_EN>,
+ <&sgmiisys CLK_SGMII_CDR_REF>,
+ <&sgmiisys CLK_SGMII_CDR_FB>,
+ <&topckgen CLK_TOP_SGMIIPLL>,
+ <&apmixedsys CLK_APMIXED_ETH2PLL>;
+ clock-names = "ethif", "esw", "gp0", "gp1", "gp2",
+ "sgmii_tx250m", "sgmii_rx250m",
+ "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck",
+ "eth2pll";
+ power-domains = <&scpsys MT7629_POWER_DOMAIN_ETHSYS>;
+ resets = <&ethsys ETHSYS_FE_RST>;
+ reset-names = "fe";
+ mediatek,ethsys = <&ethsys>;
+ mediatek,sgmiisys = <&sgmiisys>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ sgmiisys: sgmiisys@1b128000 {
+ compatible = "mediatek,mt7622-sgmiisys", "syscon";
+ reg = <0x1b128000 0x3000>;
+ #clock-cells = <1>;
+ };
+
};
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 39ffc18e29..84e5cb46e5 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -4,8 +4,8 @@
!defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_LX2160A) && \
!defined(CONFIG_ARCH_LS1028A) && !defined(CONFIG_ARCH_LS2080A) && \
!defined(CONFIG_ARCH_LS1088A) && !defined(CONFIG_ARCH_ASPEED) && \
- !defined(CONFIG_ARCH_LS1012A) && \
- !defined(CONFIG_ARCH_U8500)
+ !defined(CONFIG_ARCH_LS1012A) && !defined(CONFIG_ARCH_U8500) && \
+ !defined(CONFIG_CORTINA_PLATFORM)
#include <asm/arch/gpio.h>
#endif
#include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-cortina/Makefile b/arch/arm/mach-cortina/Makefile
new file mode 100644
index 0000000000..ffb8692271
--- /dev/null
+++ b/arch/arm/mach-cortina/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2020 Cortina Access Inc.
+#
+obj-y += lowlevel_init.o
diff --git a/arch/powerpc/cpu/mpc8xx/traps.c b/arch/powerpc/cpu/mpc8xx/traps.c
index d2bbf3e996..899bcd8618 100644
--- a/arch/powerpc/cpu/mpc8xx/traps.c
+++ b/arch/powerpc/cpu/mpc8xx/traps.c
@@ -51,7 +51,7 @@ static void print_backtrace(unsigned long *sp)
printf("\n");
}
-static void show_regs(struct pt_regs *regs)
+void show_regs(struct pt_regs *regs)
{
int i;