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authorMasahiro Yamada <yamada.masahiro@socionext.com>2018-09-10 12:58:36 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2018-09-11 20:37:19 +0900
commite39eed8f476b6f8861318fc122b546158edce259 (patch)
tree687220493a9629b2f8cad6560d5c5bfbb341fc1a /arch
parentc3ab1e118fc64b5ac49e949dab40507f6fdbbde3 (diff)
ARM: uniphier: remove ad-hoc clock enabling for EHCI
The MIO clock is enabled by default, and the STDMAC clock is enabled by the clk driver. The ad-hoc way to enable the clock is no longer needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-uniphier/clk/clk-ld11.c6
-rw-r--r--arch/arm/mach-uniphier/clk/clk-ld4.c3
-rw-r--r--arch/arm/mach-uniphier/clk/clk-pro4.c3
-rw-r--r--arch/arm/mach-uniphier/sc-regs.h3
4 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c
index ec5fa7bc8a..e997acf1b7 100644
--- a/arch/arm/mach-uniphier/clk/clk-ld11.c
+++ b/arch/arm/mach-uniphier/clk/clk-ld11.c
@@ -34,14 +34,8 @@ void uniphier_ld11_clk_init(void)
#ifdef CONFIG_USB_EHCI_HCD
{
- /* FIXME: the current clk driver can not handle parents */
- u32 tmp;
int ch;
- tmp = readl(SC_CLKCTRL4);
- tmp |= BIT(10) | BIT(8); /* MIO, STDMAC */
- writel(tmp, SC_CLKCTRL4);
-
for (ch = 0; ch < 3; ch++) {
void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL;
diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c
index d90fef07e6..9c88cde5e2 100644
--- a/arch/arm/mach-uniphier/clk/clk-ld4.c
+++ b/arch/arm/mach-uniphier/clk/clk-ld4.c
@@ -24,9 +24,6 @@ void uniphier_ld4_clk_init(void)
/* provide clocks */
tmp = readl(SC_CLKCTRL);
-#ifdef CONFIG_USB_EHCI_HCD
- tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;
#endif
diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c
index e73bf38924..32d44c0b66 100644
--- a/arch/arm/mach-uniphier/clk/clk-pro4.c
+++ b/arch/arm/mach-uniphier/clk/clk-pro4.c
@@ -39,9 +39,6 @@ void uniphier_pro4_clk_init(void)
tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
SC_CLKCTRL_CEN_GIO;
#endif
-#ifdef CONFIG_USB_EHCI_HCD
- tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
-#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;
#endif
diff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h
index c5c054e181..b105335f69 100644
--- a/arch/arm/mach-uniphier/sc-regs.h
+++ b/arch/arm/mach-uniphier/sc-regs.h
@@ -42,7 +42,6 @@
#define SC_RSTCTRL_NRST_USB3B0 (0x1 << 17) /* USB3 #0 bus */
#define SC_RSTCTRL_NRST_USB3C0 (0x1 << 16) /* USB3 #0 core */
#define SC_RSTCTRL_NRST_ETHER (0x1 << 12)
-#define SC_RSTCTRL_NRST_STDMAC (0x1 << 10)
#define SC_RSTCTRL_NRST_GIO (0x1 << 6)
/* Pro4 or older */
#define SC_RSTCTRL_NRST_UMC1 (0x1 << 5)
@@ -73,8 +72,6 @@
#define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */
#define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */
#define SC_CLKCTRL_CEN_ETHER (0x1 << 12)
-#define SC_CLKCTRL_CEN_MIO (0x1 << 11)
-#define SC_CLKCTRL_CEN_STDMAC (0x1 << 10)
#define SC_CLKCTRL_CEN_GIO (0x1 << 6)
/* Pro4 or older */
#define SC_CLKCTRL_CEN_UMC (0x1 << 4)