diff options
| author | Simon Glass <sjg@chromium.org> | 2014-10-07 22:01:38 -0600 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2014-10-08 17:25:46 +0900 |
| commit | e4d761000a50447a2afca2447088dbf282edda64 (patch) | |
| tree | 8258b67e0490297b7c457ed2d49a95d4d79d8c18 /arch | |
| parent | 3cc83f9d08a80fddf4c1e8e766eff8273f30814c (diff) | |
Exynos: Use 900MHz ARM frequency in SPL for peach_pit
The device seems to hang in SPL if the full speed is used when booting from
USB, perhaps because the PMIC has not been set to the maximum ARM core
voltage yet. Slow it down to a reliable speed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/exynos5420-peach-pit.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/dts/exynos5420-peach-pit.dts b/arch/arm/dts/exynos5420-peach-pit.dts index 3ed70a8a92..207782effb 100644 --- a/arch/arm/dts/exynos5420-peach-pit.dts +++ b/arch/arm/dts/exynos5420-peach-pit.dts @@ -32,7 +32,7 @@ mem-manuf = "samsung"; mem-type = "ddr3"; clock-frequency = <800000000>; - arm-frequency = <1700000000>; + arm-frequency = <900000000>; }; tmu@10060000 { |