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authorChristophe Leroy <christophe.leroy@c-s.fr>2017-07-13 15:09:50 +0200
committerTom Rini <trini@konsulko.com>2017-07-22 22:22:48 -0400
commitf0eda3cb89813c49d90fec7ee5fa69d3fe3d6daa (patch)
tree5aa0b7482b3acc9249d5cff335a065b1ba8fe58a /arch
parent93e85d02b21cdcd431df2237b883218f5c4059af (diff)
power, timer: reset TBL before TBU
In order to avoid TBU increment due to TBL reaching its max and wrapping, reset TBL before resetting TBU Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/lib/time.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/lib/time.c b/arch/powerpc/lib/time.c
index ff9bb67e28..c43f254481 100644
--- a/arch/powerpc/lib/time.c
+++ b/arch/powerpc/lib/time.c
@@ -66,7 +66,7 @@ int timer_init(void)
unsigned long temp;
/* reset */
- asm volatile("li %0,0 ; mttbu %0 ; mttbl %0;"
+ asm volatile("li %0,0 ; mttbl %0 ; mttbu %0;"
: "=&r"(temp) );
return (0);