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| author | Stephen Warren <swarren@nvidia.com> | 2016-03-22 09:45:36 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2016-03-29 09:57:57 -0700 |
| commit | 8f83759fac57cb25e23f6f75c001fe23aea47ee1 (patch) | |
| tree | 67e875a91022af1f4e6895bf474603a874bd33a2 /board/Arcturus/ucp1020 | |
| parent | f3c2cab87878d2ecd5bd796ee940dff814aa3255 (diff) | |
ARM: tegra210: set PLLE_PTS bit when enabling PLLE
This bit needs to be set for system suspend/resume to work. This setting
will be documented in an updated TRM at some time in the future.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/Arcturus/ucp1020')
0 files changed, 0 insertions, 0 deletions