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| author | Paul Burton <paul.burton@imgtec.com> | 2016-09-21 11:18:49 +0100 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-09-21 15:04:04 +0200 |
| commit | 33b5c9b2092e10fa3b8b325823c846368f25bba9 (patch) | |
| tree | 82545fc3c03572f244679cdfcd4c7387d0a24c41 /board/Marvell | |
| parent | 8cb4817d0f076605c5126f0925f6c7fdb0461bf6 (diff) | |
MIPS: Enable use of the instruction cache earlier
Enable use of the instruction cache immediately after it has been
initialised. This will only take effect if U-Boot was linked to run from
kseg0 rather than kseg1, but when this is the case the data cache
initialisation code will run cached & thus significantly faster.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'board/Marvell')
0 files changed, 0 insertions, 0 deletions