diff options
| author | Stefan Roese <sr@denx.de> | 2007-06-19 16:42:31 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-06-19 16:42:31 +0200 |
| commit | df8a24cdd30151505cf57bbee5289e91bf53bd1b (patch) | |
| tree | ff5305f90f000aead5a0cbf3a8e3501ea6102021 /board/amcc/acadia | |
| parent | 86ba99e34194394052d24c04dc40d1263d29a26f (diff) | |
[ppc4xx] Fix problem with NAND booting on AMCC Acadia
The latest changes showed a problem with the location of the NAND-SPL
image in the OCM and the init-data area (incl. cache). This patch
fixes this problem.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/acadia')
| -rw-r--r-- | board/amcc/acadia/Makefile | 2 | ||||
| -rw-r--r-- | board/amcc/acadia/acadia.c | 2 | ||||
| -rw-r--r-- | board/amcc/acadia/memory.c | 11 |
3 files changed, 14 insertions, 1 deletions
diff --git a/board/amcc/acadia/Makefile b/board/amcc/acadia/Makefile index ddbcb8091f..c56b2733a9 100644 --- a/board/amcc/acadia/Makefile +++ b/board/amcc/acadia/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o cmd_acadia.o cpr.o memory.o +COBJS = $(BOARD).o cmd_acadia.o memory.o pll.o SOBJS = SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/amcc/acadia/acadia.c b/board/amcc/acadia/acadia.c index 46d63e6308..0f54025fb2 100644 --- a/board/amcc/acadia/acadia.c +++ b/board/amcc/acadia/acadia.c @@ -55,10 +55,12 @@ int board_early_init_f(void) { unsigned int reg; +#if !defined(CONFIG_NAND_U_BOOT) /* don't reinit PLL when booting via I2C bootstrap option */ mfsdr(SDR_PINSTP, reg); if (reg != 0xf0000000) board_pll_init_f(); +#endif acadia_gpio_init(); diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c index 25904d3b94..9346d2c52f 100644 --- a/board/amcc/acadia/memory.c +++ b/board/amcc/acadia/memory.c @@ -31,6 +31,8 @@ #include <asm/io.h> #include <asm/gpio.h> +extern void board_pll_init_f(void); + /* * sdram_init - Dummy implementation for start.S, spd_sdram used on this board! */ @@ -67,6 +69,15 @@ static void cram_bcr_write(u32 wr_val) long int initdram(int board_type) { +#if defined(CONFIG_NAND_SPL) + u32 reg; + + /* don't reinit PLL when booting via I2C bootstrap option */ + mfsdr(SDR_PINSTP, reg); + if (reg != 0xf0000000) + board_pll_init_f(); +#endif + #if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) int i; u32 val; |