diff options
| author | Stefan Roese <sr@denx.de> | 2009-09-09 16:25:29 +0200 |
|---|---|---|
| committer | Tom Rix <Tom.Rix@windriver.com> | 2009-10-03 09:04:22 -0500 |
| commit | 297a65873d2cb2bd296253af51f59cc1391afbff (patch) | |
| tree | 1d89769d4753584c47efb04a44b498241315fb40 /board/amcc/taihu/taihu.c | |
| parent | e35c73d7e19e6ea45efcaf807736277afee9c7d1 (diff) | |
ppc4xx: Big cleanup of PPC4xx defines
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:
- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines
Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/taihu/taihu.c')
| -rw-r--r-- | board/amcc/taihu/taihu.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c index d8806ac32d..4e5796ee82 100644 --- a/board/amcc/taihu/taihu.c +++ b/board/amcc/taihu/taihu.c @@ -48,14 +48,14 @@ int board_early_init_f(void) mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */ - mtebc(pb3ap, CONFIG_SYS_EBC_PB3AP); /* memory bank 3 (CPLD_LCM) initialization */ - mtebc(pb3cr, CONFIG_SYS_EBC_PB3CR); + mtebc(PB3AP, CONFIG_SYS_EBC_PB3AP); /* memory bank 3 (CPLD_LCM) initialization */ + mtebc(PB3CR, CONFIG_SYS_EBC_PB3CR); /* * Configure CPC0_PCI to enable PerWE as output * and enable the internal PCI arbiter */ - mtdcr(cpc0_pci, CPC0_PCI_SPE | CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN); + mtdcr(CPC0_PCI, CPC0_PCI_SPE | CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN); return 0; } |