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authorJon Loeliger <jdl@freescale.com>2007-11-02 15:22:01 -0500
committerJon Loeliger <jdl@freescale.com>2007-11-02 15:22:01 -0500
commit3cac27c1d40b151f295dcfdb514fa928732e4ecf (patch)
tree5dbc1813bfa548e8d31879c39c075bfdcbbf8f86 /board/amcc
parent3c89d75409eb26639d36dfa11d4ee3d8b962dc3c (diff)
parente60adeac2d8fa30258e1706bb342a3363526e8d7 (diff)
Merge commit 'remotes/wd/master'
Diffstat (limited to 'board/amcc')
-rw-r--r--board/amcc/sequoia/cmd_sequoia.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/board/amcc/sequoia/cmd_sequoia.c b/board/amcc/sequoia/cmd_sequoia.c
index e7997e94db..6b9043a058 100644
--- a/board/amcc/sequoia/cmd_sequoia.c
+++ b/board/amcc/sequoia/cmd_sequoia.c
@@ -40,7 +40,7 @@
* All Sequoias & Rainiers select from two possible EEPROMs in Boot
* Config F. One for 33MHz PCI, one for 66MHz PCI. The following
* values are for the 33MHz PCI configuration. Byte 5 (0 base) is
- * the only value affected for a 66MHz PCI and simply needs a +0x10.
+ * the only value affected for a 33MHz PCI and simply needs a | 0x08.
*/
#define NAND_COMPATIBLE 0x01
@@ -57,6 +57,7 @@ static char *config_labels[] = {
"CPU: 416 PLB: 166 OPB: 83 EBC: 55",
"CPU: 500 PLB: 166 OPB: 83 EBC: 55",
"CPU: 533 PLB: 133 OPB: 66 EBC: 66",
+ "CPU: 667 PLB: 133 OPB: 66 EBC: 66",
"CPU: 667 PLB: 166 OPB: 83 EBC: 55",
NULL
};
@@ -98,6 +99,11 @@ static u8 boot_configs[][17] = {
0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
},
{
+ (NOR_COMPATIBLE),
+ 0x87, 0x78, 0xa2, 0x56, 0x09, 0x57, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
(NAND_COMPATIBLE | NOR_COMPATIBLE),
0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, 0x40,
0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00