diff options
author | Beniamino Galvani <b.galvani@gmail.com> | 2018-06-14 13:43:40 +0200 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2018-06-19 07:31:47 -0400 |
commit | 2e668af5531815dc6a6190cf6490b866da71ffaa (patch) | |
tree | 19f0f2494c4484d7476472ead10d9e4a1d820c26 /board/amlogic/odroid-c2 | |
parent | c0fc1e215c6117b159bb9ca736d3e3338bbc028b (diff) |
meson: use the clock driver
Use the clk framework to initialize clocks from drivers that need them
instead of having hardcoded frequencies and initializations from board
code.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Diffstat (limited to 'board/amlogic/odroid-c2')
-rw-r--r-- | board/amlogic/odroid-c2/odroid-c2.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/board/amlogic/odroid-c2/odroid-c2.c b/board/amlogic/odroid-c2/odroid-c2.c index 1b7fd8199b..c47b9ce9cb 100644 --- a/board/amlogic/odroid-c2/odroid-c2.c +++ b/board/amlogic/odroid-c2/odroid-c2.c @@ -30,9 +30,6 @@ int misc_init_r(void) meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0); - /* Enable power and clock gate */ - setbits_le32(GX_GCLK_MPEG_0, GX_GCLK_MPEG_0_I2C); - /* Reset PHY on GPIOZ_14 */ clrbits_le32(GX_GPIO_EN(3), BIT(14)); clrbits_le32(GX_GPIO_OUT(3), BIT(14)); |