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authorPaul Burton <paul.burton@imgtec.com>2016-09-21 11:18:51 +0100
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2016-09-21 15:04:04 +0200
commitf8981277f581564bf701d310fe0f68903cf3f542 (patch)
treeb21d2134c34a7bfe6bcce532d4872353569ab2eb /board/amlogic
parent4f9226b40379847339af8a7777be26f2db72e79b (diff)
MIPS: If we don't need DDR for cache init, init cache first
On systems where cache initialisation doesn't require zeroed memory (ie. systems where CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD is not defined) perform cache initialisation prior to lowlevel_init & DDR initialisation. This allows for DDR initialisation code to run cached & thus significantly faster. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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