board: armltd: Add support for Total Compute platform

Total Compute is based on ARM architecture and has
the following features enabled in u-boot:
- PL011 UART
- PL180 MMC
- NOR Flash
- FIT image with Signature
- AVB

Signed-off-by: Usama Arif <usama.arif@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

4 files changed, 92 insertions, 0 deletions

diff --git a/board/armltd/total_compute/Kconfig b/board/armltd/total_compute/Kconfig
new file mode 100644
index 0000000000..62e6e6f4ac
--- /dev/null
+++ b/board/armltd/total_compute/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_TOTAL_COMPUTE
+
+config SYS_BOARD
+	default "total_compute"
+
+config SYS_VENDOR
+	default "armltd"
+
+config SYS_CONFIG_NAME
+	default "total_compute"
+
+endif
diff --git a/board/armltd/total_compute/MAINTAINERS b/board/armltd/total_compute/MAINTAINERS
new file mode 100644
index 0000000000..3dc1cd188a
--- /dev/null
+++ b/board/armltd/total_compute/MAINTAINERS
@@ -0,0 +1,7 @@
+TOTAL_COMPUTE BOARD
+M:	Usama Arif <usama.arif@arm.com>
+S:	Maintained
+F:	board/armltd/total_compute/
+F:	include/configs/total_compute.h
+F:	configs/total_compute_defconfig
+F:	arch/arm/dts/total_compute.dts
diff --git a/board/armltd/total_compute/Makefile b/board/armltd/total_compute/Makefile
new file mode 100644
index 0000000000..8b10458431
--- /dev/null
+++ b/board/armltd/total_compute/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2020 Arm Limited
+# Usama Arif <usama.arif@arm.com>
+
+obj-y	:= total_compute.o
diff --git a/board/armltd/total_compute/total_compute.c b/board/armltd/total_compute/total_compute.c
new file mode 100644
index 0000000000..0be6435fe3
--- /dev/null
+++ b/board/armltd/total_compute/total_compute.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020 Arm Limited
+ * Usama Arif <usama.arif@arm.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/platform_data/serial_pl01x.h>
+#include <asm/armv8/mmu.h>
+
+static const struct pl01x_serial_platdata serial_platdata = {
+	.base = UART0_BASE,
+	.type = TYPE_PL011,
+	.clock = CONFIG_PL011_CLOCK,
+};
+
+U_BOOT_DEVICE(total_compute_serials) = {
+	.name = "serial_pl01x",
+	.platdata = &serial_platdata,
+};
+
+static struct mm_region total_compute_mem_map[] = {
+	{
+		.virt = 0x0UL,
+		.phys = 0x0UL,
+		.size = 0x80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		.virt = 0x80000000UL,
+		.phys = 0x80000000UL,
+		.size = 0xff80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = total_compute_mem_map;
+
+int board_init(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = PHYS_SDRAM_1_SIZE;
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
+}
+
+/* Nothing to be done here as handled by PSCI interface */
+void reset_cpu(ulong addr)
+{
+}