diff options
author | Sedji Gaouaou <sedji.gaouaou@atmel.com> | 2009-06-24 08:32:09 +0200 |
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committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-07-06 21:50:09 +0200 |
commit | 0aafde1dc76d6d65d6be10bf499ec86d9ffee8b9 (patch) | |
tree | f2b006c740f5e4af2469cefd81a58a730b46e530 /board/atmel/at91sam9263ek/at91sam9263ek.c | |
parent | 5710de45808eb8f1cc34b51dc3e67e2422113249 (diff) |
at91sam9260/9263: add back up for the rst(reset controller).
On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register was
set to 0 after being set to 500 ms for the PHY reset.
Do backup the old reset length and restore it after the MACB initialisation.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
Signed-off-by: Stelian Pop <stelian@popies.net>
Diffstat (limited to 'board/atmel/at91sam9263ek/at91sam9263ek.c')
-rw-r--r-- | board/atmel/at91sam9263ek/at91sam9263ek.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 660c473445..0b7065b715 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -91,6 +91,8 @@ static void at91sam9263ek_nand_hw_init(void) #ifdef CONFIG_MACB static void at91sam9263ek_macb_hw_init(void) { + unsigned long rstc; + /* Enable clock */ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC); @@ -108,6 +110,8 @@ static void at91sam9263ek_macb_hw_init(void) pin_to_mask(AT91_PIN_PE26), pin_to_controller(AT91_PIN_PE0) + PIO_PUDR); + rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL; + /* Need to reset PHY -> 500ms reset */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | (AT91_RSTC_ERSTL & (0x0D << 8)) | @@ -120,7 +124,7 @@ static void at91sam9263ek_macb_hw_init(void) /* Restore NRST value */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - (AT91_RSTC_ERSTL & (0x0 << 8)) | + (rstc) | AT91_RSTC_URSTEN); /* Re-enable pull-up */ |