diff options
| author | Thierry Reding <thierry.reding@avionic-design.de> | 2012-07-30 20:21:55 +0000 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2012-09-07 13:54:31 -0700 |
| commit | 62fd66f3d38eeadeed17ce457600372d694f3bd2 (patch) | |
| tree | 682deceb3ea299695450c2125fe8b7c3e242dc47 /board/avionic-design/dts/tegra20-tec.dts | |
| parent | 9614a1e9636976add95730c2da569ac1b274f232 (diff) | |
cmd_nand: dump: Align data and OOB buffers
In order for cache invalidation and flushing to work properly, the data
and OOB buffers must be aligned to full cache lines.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/avionic-design/dts/tegra20-tec.dts')
0 files changed, 0 insertions, 0 deletions