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authorKever Yang <kever.yang@rock-chips.com>2019-11-13 11:14:12 +0800
committerKever Yang <kever.yang@rock-chips.com>2019-11-17 17:22:53 +0800
commit7acd0302108e9e100d92264a850b0146f5823594 (patch)
tree37a966524e12ec8543a01a566e7d484772e615c9 /board/bitmain/antminer_s9/bitmain-antminer-s9
parent4d273ff3048e945712da2866fe126cf5c8d710a4 (diff)
rockchip: rk3399: orangepi: Add init value for vdd_log
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'board/bitmain/antminer_s9/bitmain-antminer-s9')
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