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authorRajan Vaja <rajan.vaja@xilinx.com>2020-01-16 03:55:05 -0800
committerMichal Simek <michal.simek@xilinx.com>2020-02-28 12:04:10 +0100
commit65bcca9f52af8ff88d46de317a9ca6e8a2da5d69 (patch)
treed91f05f04a046e9fcb1b9f348cab2d6093ef734d /board/bitmain/antminer_s9
parent1bf9e01b8f82c442029607ab953c6a0d099c7d68 (diff)
versal: drivers: clk: Fix invalid clock name queries
The clock driver makes EEMI call to get the name of invalid clk when executing versal_get_clock_info() function. This results in error messages. Added check for validating clock before saving clock attribute and calling versal_pm_clock_get_name() in versal_get_clock_info() function. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'board/bitmain/antminer_s9')
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