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authorRayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>2020-07-15 22:48:55 +0530
committerTom Rini <trini@konsulko.com>2020-07-29 10:13:40 -0400
commit291635aecf84442876030972fd05b767e738f6fb (patch)
tree3ae6c0cba7b37489a1ef4e63fc149d6cc26e2137 /board/broadcom
parent423e08cb77015beab6a81595765ec1faa34bedde (diff)
board: ns3: add support for Broadcom Northstar 3
Add support for Broadcom Northstar 3 SoC. NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors targeting a broad range of networking applications. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board/broadcom')
-rw-r--r--board/broadcom/bcmns3/Kconfig15
-rw-r--r--board/broadcom/bcmns3/Makefile5
-rw-r--r--board/broadcom/bcmns3/ns3.c64
3 files changed, 84 insertions, 0 deletions
diff --git a/board/broadcom/bcmns3/Kconfig b/board/broadcom/bcmns3/Kconfig
new file mode 100644
index 0000000000..8ce21f980d
--- /dev/null
+++ b/board/broadcom/bcmns3/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_BCMNS3
+
+config SYS_BOARD
+ default "bcmns3"
+
+config SYS_VENDOR
+ default "broadcom"
+
+config SYS_SOC
+ default "bcmns3"
+
+config SYS_CONFIG_NAME
+ default "bcm_ns3"
+
+endif
diff --git a/board/broadcom/bcmns3/Makefile b/board/broadcom/bcmns3/Makefile
new file mode 100644
index 0000000000..3404260148
--- /dev/null
+++ b/board/broadcom/bcmns3/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2020 Broadcom.
+
+obj-y := ns3.o
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
new file mode 100644
index 0000000000..e38156723c
--- /dev/null
+++ b/board/broadcom/bcmns3/ns3.c
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom.
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/armv8/mmu.h>
+
+static struct mm_region ns3_mem_map[] = {
+ {
+ .virt = 0x0UL,
+ .phys = 0x0UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ .virt = 0x80000000UL,
+ .phys = 0x80000000UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = ns3_mem_map;
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int board_late_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ if (fdtdec_setup_mem_size_base() != 0)
+ return -EINVAL;
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ fdtdec_setup_memory_banksize();
+
+ return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+ psci_system_reset();
+}