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authorMaxim Yu. Osipov <mosipov@ilbers.de>2018-02-20 11:08:09 +0100
committerStefano Babic <sbabic@denx.de>2018-02-22 14:30:53 +0100
commitd247cf50698a590571cf9a6fd4608e702580e40e (patch)
treea31691ef9d5c1f13a164f0edb8c016be8bcf2703 /board/compulab/cm_fx6/spl.c
parent04a03b240f09466683b810c0f09c04b1649350f3 (diff)
Revert "mx6: ddr: Allow changing REFSEL and REFR fields"
This reverts commit edf0093732225c2fd0791c3864e9a3eef1f92f19 for cm_fx6 iMX.6 Solo module as it causes frequent (around 10 percent of power cycles) board's hangs. These hangs happen in SPL when BSS is being initialized in SDRAM - it appear that variables from BSS contain trash values which lead to board hangs. Looks like that SDRAM doesn't yet finish initialization in these cases. Signed-off-by: Maxim Yu. Osipov <mosipov@ilbers.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'board/compulab/cm_fx6/spl.c')
-rw-r--r--board/compulab/cm_fx6/spl.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c
index 56aac60239..16e5bf8dfa 100644
--- a/board/compulab/cm_fx6/spl.c
+++ b/board/compulab/cm_fx6/spl.c
@@ -107,8 +107,6 @@ static struct mx6_ddr_sysinfo cm_fx6_sysinfo_s = {
.mif3_mode = 3,
.rst_to_cke = 0x23,
.sde_to_rst = 0x10,
- .refsel = 1, /* Refresh cycles at 32KHz */
- .refr = 7, /* 8 refresh commands per refresh cycle */
};
static struct mx6_ddr3_cfg cm_fx6_ddr3_cfg_s = {