diff options
author | Bartlomiej Sieka <tur@semihalf.com> | 2006-03-05 18:57:33 +0100 |
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committer | Bartlomiej Sieka <tur@semihalf.com> | 2006-03-05 18:57:33 +0100 |
commit | addb2e1650fdf872334478393f482dfdce965a61 (patch) | |
tree | c16d3de22d1e1040d3f8e6ecfaed20bf2f2c5ea6 /board/dave | |
parent | 038ccac511214b062c56f22b9413f784b86bcd87 (diff) |
Re-factoring the legacy NAND code (legacy NAND now only in board-specific
code and in SoC code). Boards using the old way have CFG_NAND_LEGACY and
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a added. Build breakage for
NETTA.ERR and NETTA_ISDN - will go away when the new NAND support is
implemented for these boards.
Diffstat (limited to 'board/dave')
-rw-r--r-- | board/dave/PPChameleonEVB/config.mk | 6 | ||||
-rw-r--r-- | board/dave/PPChameleonEVB/nand.c | 36 |
2 files changed, 8 insertions, 34 deletions
diff --git a/board/dave/PPChameleonEVB/config.mk b/board/dave/PPChameleonEVB/config.mk index 6e03b72b66..5d3df0c858 100644 --- a/board/dave/PPChameleonEVB/config.mk +++ b/board/dave/PPChameleonEVB/config.mk @@ -27,5 +27,9 @@ # Reserve 320 kB for Monitor TEXT_BASE = 0xFFFB0000 -# Compile the new NAND code (needed iff #ifdef CONFIG_NEW_NAND_CODE) +# Compile the new NAND code (CFG_NAND_LEGACY mustn't be defined) BOARDLIBS = drivers/nand/libnand.a + +# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) +#BOARDLIBS = drivers/nand_legacy/libnand_legacy.a + diff --git a/board/dave/PPChameleonEVB/nand.c b/board/dave/PPChameleonEVB/nand.c index 16c67cd972..61edc787fa 100644 --- a/board/dave/PPChameleonEVB/nand.c +++ b/board/dave/PPChameleonEVB/nand.c @@ -22,9 +22,8 @@ #include <common.h> + #if (CONFIG_COMMANDS & CFG_CMD_NAND) -#ifdef CONFIG_NEW_NAND_CODE -/* new NAND handling */ #include <nand.h> @@ -90,7 +89,7 @@ static int ppchameleonevb_device_ready(struct mtd_info *mtdinfo) /* * Board-specific NAND initialization. The following members of the - * argument are board-specific (per include/linux/mtd/nand_new.h): + * argument are board-specific (per include/linux/mtd/nand.h): * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device * - hwcontrol: hardwarespecific function for accesing control-lines @@ -115,33 +114,4 @@ void board_nand_init(struct nand_chip *nand) nand->chip_delay = NAND_BIG_DELAY_US; nand->options = NAND_SAMSUNG_LP_OPTIONS; } - -#else - -/* old NAND handling */ -extern ulong -nand_probe(ulong physadr); - -void -nand_init(void) -{ - ulong totlen = 0; - -/* - The HI model is equipped with a large block NAND chip not supported yet - by U-Boot - (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_HI) -*/ - -#if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME) - debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE); - totlen += nand_probe (CFG_NAND0_BASE); -#endif /* CONFIG_PPCHAMELEON_MODULE_ME, CONFIG_PPCHAMELEON_MODULE_HI */ - - debug ("Probing at 0x%.8x\n", CFG_NAND1_BASE); - totlen += nand_probe (CFG_NAND1_BASE); - - printf ("%3lu MB\n", totlen >>20); -} -#endif -#endif +#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ |