Davinci 8xx: Move common functions to share code

As more Davinci 8xx board can be added, move common code
to be shared between boards.

 * rebased ontop of Sugosh's patches
 * moving the HAWKBOARD_KICK{0,1}_UNLOCK defines to
   arch/arm/include/asm/arch-davinci/davinci_misc.h from to
   arch/arm/include/asm/arch-davinci/da8xx_common.h
 * don't define dram functions in PRELOADER
 * move sync_env_enetaddr into existing EMAC ifdef
 * use misc.c in hawkboard nand_spl

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

1 files changed, 53 insertions, 1 deletions

diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c
index f25ad7ee7a..08c898fed5 100644
--- a/board/davinci/common/misc.c
+++ b/board/davinci/common/misc.c
@@ -33,6 +33,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifndef CONFIG_PRELOADER
 int dram_init(void)
 {
 	/* dram_init must store complete ramsize in gd->ram_size */
@@ -47,6 +48,7 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = gd->ram_size;
 }
+#endif
 
 #ifdef CONFIG_DRIVER_TI_EMAC
 
@@ -76,6 +78,22 @@ err:
 }
 
 /*
+ * Set the mii mode as MII or RMII
+ */
+#if defined(CONFIG_DRIVER_TI_EMAC)
+void davinci_emac_mii_mode_sel(int mode_sel)
+{
+	int val;
+
+	val = readl(&davinci_syscfg_regs->cfgchip3);
+	if (mode_sel == 0)
+		val &= ~(1 << 8);
+	else
+		val |= (1 << 8);
+	writel(val, &davinci_syscfg_regs->cfgchip3);
+}
+#endif
+/*
  * If there is no MAC address in the environment, then it will be initialized
  * (silently) from the value in the EEPROM.
  */
@@ -94,4 +112,38 @@ void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)
 	}
 }
 
-#endif	/* DAVINCI_EMAC */
+#endif	/* CONFIG_DRIVER_TI_EMAC */
+
+#if defined(CONFIG_SOC_DA8XX)
+#ifndef CONFIG_USE_IRQ
+void irq_init(void)
+{
+	/*
+	 * Mask all IRQs by clearing the global enable and setting
+	 * the enable clear for all the 90 interrupts.
+	 */
+
+	writel(0, &davinci_aintc_regs->ger);
+
+	writel(0, &davinci_aintc_regs->hier);
+
+	writel(0xffffffff, &davinci_aintc_regs->ecr1);
+	writel(0xffffffff, &davinci_aintc_regs->ecr2);
+	writel(0xffffffff, &davinci_aintc_regs->ecr3);
+}
+#endif
+
+/*
+ * Enable PSC for various peripherals.
+ */
+int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
+				    const int n_items)
+{
+	int i;
+
+	for (i = 0; i < n_items; i++)
+		lpsc_on(item[i].lpsc_no);
+
+	return 0;
+}
+#endif