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authorWolfgang Denk <wd@denx.de>2011-11-08 00:38:52 +0100
committerWolfgang Denk <wd@denx.de>2011-11-08 00:38:52 +0100
commit688d8f33f27ea596efb6632388ee60360996eed0 (patch)
tree961e812048557d4ac7062e6a7387f543e7d634af /board/davinci/ea20
parent7ba6d591b5a6ec4ed502de7d94ff726bce13fe61 (diff)
parent2026a119512a9cced2957221e83fef92b8211d26 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: Arm: re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board arm: jadecpu: Readd MACH_TYPE_JADECPU at91: defined mach-types for otc570 board in board config file at91: defined mach-types for meesc board in board config file mx31pdk: Enable D and I caches ehci-mxc: remove incorrect comment README: Fix supported i.MX SoC list for CONFIG_MXC_SPI mx53: Turn off child clocks before reconfigure perclk_root qong: enable support for compressed images imx: imx31_phycore.h: fix checkpatch warnings vision2: Remove unused get_board_rev function mx53smd: Remove unused get_board_rev function mx53ard: Remove unused get_board_rev function mx53evk: Remove unused get_board_rev function mx53evk: Add RTC support mx53loco: Remove unused get_board_rev function mx53evk: Remove unneeded '1' from mx53evk.h OMAP3: mvblx: Initial support for mvBlueLYNX-X ARM: dig297: Define MACH_TYPE_OMAP3_CPS and CONFIG_MACH_TYPE omap3: mem: Move comments next to definitions omap3: mem: Clean-up whitespaces omap3: mem: Define and use common macros Davinci: ea20: added PREBOOT to configuration Davinci: ea20: added I2C support Davinci: ea20: added video support VIDEO: davinci: add framebuffer to da8xx ARM: Davinci: added missing registers to hardware.h Davinci: ea20: add gpios for LCD backlight control Davinci: ea20: add gpio for keeping power on in board_late_init Davinci: ea20: Add default U-Boot environment Davinci: ea20: Add early init to get early output from console Davinci: ea20: Add NAND support Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console Davinci: ea20: set console on UART0 arm, davinci: add cam_enc_4xx support arm926ejs, davinci: add missing spi defines for dm365 arm926ejs, davinci: add cpuinfo for dm365 arm, davinci: add lowlevel function for dm365 soc arm, davinci: add header files for dm365 spl, nand: add 4bit HW ecc oob first nand_read_page function arm, davinci: add support for new spl framework spl: add option for adding post memory test to the SPL framework net, davinci_emac: make clock divider in MDIO control register configurable arm, usb, davinci: make USBPHY_CTL register configurable usb, davinci: add enable_vbus() weak function omap3evm: fix errors caused by multiple definitions omap3evm: Add (quick) configuration for NAND only omap3evm: Add (quick) configuration for MMC/SD only omap3evm: move common config options to new file omap3evm: Prepare to split configuration omap3evm: Reorder related config options omap/spl: actually enable the console davinci_emac: compilation fix, phy is array now omap3evm: Set environment variable 'ethaddr' arm, arm926: fix missing symbols in NAND_SPL mode arm, davinci: Add function lpsc_syncreset() arm, davinci: replace CONFIG_PRELOADER with CONFIG_SPL_BUILD arm/km: portl2 environment address update to P1B arm/km: adapt bootcounter evaluation arm/km: enable jffs2 cmds arm/km: trigger reconfiguration for the Xilinx FPGA arm/km: add boardid and hwkey to kernel command line ARM: Reintroduce MACH_TYPE_KM_KIRKWOOD for keymile ARM boards netspace_v2: enable I2C EEPROM support netspace_v2: fix SDRAM configuration armada100: define CONFIG_SYS_CACHELINE_SIZE pantheon: define CONFIG_SYS_CACHELINE_SIZE kirkwood: define CONFIG_SYS_CACHELINE_SIZE kirkwood: drop empty asm-offsets.s file arm/km/mgcoge3un: enhance "waitforne" feature arm/km: add variable waitforne to mgcoge3un gplugD: Fix for error:MACH_TYPE_SHEEVAD undeclared ARM: dreamplug: fix compilation ARM: DockStar: fix compilation ARM: netspace_v2: fix warnings am335x: Drop board_sysinfo struct am335x: Temporarily add MACH_TYPE define misc:pmic:samsung Enable PMIC driver at C210 Universal target dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p UNIVERSAL C210 target dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target smdkv310: use macro for mmc data read function address smdkv310: use spl framework for mmc spl SMDKV310: use get_ram_size() to validate dram size SMDKV310: Initialize board id using CONFIG_MACH_TYPE ORIGEN : use absolute paths and fix tool naming ORIGEN : enable device tree support MX25: tx25: Fix building due to missing MACH_TYPE mx31: Add board support for HALE TT-01 mx31: add ESD control registers mx31: define pins and init for UART2 and CSPI3 MX35: add support for flea3 board MX51: vision2: add MACH_TYPE in config file vision2: Remove unused header file mx51evk: Remove unused get_board_rev function mx51evk: Remove unneeded '1' from mx51evk.h I2C: Fix mxc_i2c.c problem on imx31_phycore mx35pdk: Add RTC support mx51evk: Use GPIO API for configuring the IOMUX mx51evk: Add RTC support rtc: Make mc13783-rtc driver generic qong: remove unneeded IOMUX settings qong: Use mx31_set_gpr to setup USBH2 pins mx31: Introduce mx31_set_gpr function mx31pdk: Add MC13783 PMIC support qong: remove unneeded "1" from qong.h misc: pmic: fix regression in pmic_fsl.c (SPI) mx5 configs: CONFIG_PRIME should really be CONFIG_ETHPRIME MX35: Drop unnecessary prototypes from imx-regs.h I2C: added I2C-2 and I2C-3 to MX35 MX35: factorize common assembly code MX35: add reset cause as provided by other i.MX MX35: add pins definition for UART3 MX35: added ESDC structure to imx-regs
Diffstat (limited to 'board/davinci/ea20')
-rw-r--r--board/davinci/ea20/ea20.c205
1 files changed, 172 insertions, 33 deletions
diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c
index 9d0f71bc55..720a3607a7 100644
--- a/board/davinci/ea20/ea20.c
+++ b/board/davinci/ea20/ea20.c
@@ -35,11 +35,28 @@
#include <asm/arch/emac_defs.h>
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/da8xx-fb.h>
DECLARE_GLOBAL_DATA_PTR;
#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
+static const struct da8xx_panel lcd_panel = {
+ /* Casio COM57H531x */
+ .name = "Casio_COM57H531x",
+ .width = 640,
+ .height = 480,
+ .hfp = 12,
+ .hbp = 144,
+ .hsw = 30,
+ .vfp = 10,
+ .vbp = 35,
+ .vsw = 3,
+ .pxl_clk = 25000000,
+ .invert_pxl_clk = 0,
+};
+
/* SPI0 pin muxer settings */
static const struct pinmux_config spi1_pins[] = {
{ pinmux(5), 1, 1 },
@@ -48,12 +65,18 @@ static const struct pinmux_config spi1_pins[] = {
{ pinmux(5), 1, 5 }
};
-/* UART pin muxer settings */
+/* I2C pin muxer settings */
+static const struct pinmux_config i2c_pins[] = {
+ { pinmux(4), 2, 2 },
+ { pinmux(4), 2, 3 }
+};
+
+/* UART0 pin muxer settings */
static const struct pinmux_config uart_pins[] = {
- { pinmux(0), 4, 6 },
- { pinmux(0), 4, 7 },
- { pinmux(4), 2, 4 },
- { pinmux(4), 2, 5 }
+ { pinmux(3), 2, 7 },
+ { pinmux(3), 2, 6 },
+ { pinmux(3), 2, 4 },
+ { pinmux(3), 2, 5 }
};
#ifdef CONFIG_DRIVER_TI_EMAC
@@ -73,70 +96,136 @@ static const struct pinmux_config emac_pins[] = {
#ifdef CONFIG_NAND_DAVINCI
const struct pinmux_config nand_pins[] = {
- { pinmux(7), 1, 1 },
- { pinmux(7), 1, 2 },
- { pinmux(7), 1, 4 },
- { pinmux(7), 1, 5 },
- { pinmux(9), 1, 0 },
- { pinmux(9), 1, 1 },
- { pinmux(9), 1, 2 },
- { pinmux(9), 1, 3 },
- { pinmux(9), 1, 4 },
- { pinmux(9), 1, 5 },
- { pinmux(9), 1, 6 },
- { pinmux(9), 1, 7 },
- { pinmux(12), 1, 5 },
- { pinmux(12), 1, 6 }
+ { pinmux(7), 1, 0}, /* CS2 */
+ { pinmux(7), 0, 1}, /* CS3 in three state*/
+ { pinmux(7), 1, 4 }, /* EMA_WE */
+ { pinmux(7), 1, 5 }, /* EMA_OE */
+ { pinmux(9), 1, 0 }, /* EMA_D[7] */
+ { pinmux(9), 1, 1 }, /* EMA_D[6] */
+ { pinmux(9), 1, 2 }, /* EMA_D[5] */
+ { pinmux(9), 1, 3 }, /* EMA_D[4] */
+ { pinmux(9), 1, 4 }, /* EMA_D[3] */
+ { pinmux(9), 1, 5 }, /* EMA_D[2] */
+ { pinmux(9), 1, 6 }, /* EMA_D[1] */
+ { pinmux(9), 1, 7 }, /* EMA_D[0] */
+ { pinmux(12), 1, 5 }, /* EMA_A[2] */
+ { pinmux(12), 1, 6 }, /* EMA_A[1] */
+ { pinmux(6), 1, 0 } /* EMA_CLK */
};
#endif
+const struct pinmux_config gpio_pins[] = {
+ { pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/
+ { pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/
+ { pinmux(13), 8, 3 }, /* GPIO6[12] U0_SW1 on EA20-00101_2*/
+ { pinmux(19), 8, 5 }, /* GPIO6[1] DISP_ON */
+ { pinmux(14), 8, 1 } /* GPIO6[6] LCD_B_PWR*/
+};
+
+const struct pinmux_config lcd_pins[] = {
+ { pinmux(17), 2, 1 }, /* LCD_D_0 */
+ { pinmux(17), 2, 0 }, /* LCD_D_1 */
+ { pinmux(16), 2, 7 }, /* LCD_D_2 */
+ { pinmux(16), 2, 6 }, /* LCD_D_3 */
+ { pinmux(16), 2, 5 }, /* LCD_D_4 */
+ { pinmux(16), 2, 4 }, /* LCD_D_5 */
+ { pinmux(16), 2, 3 }, /* LCD_D_6 */
+ { pinmux(16), 2, 2 }, /* LCD_D_7 */
+ { pinmux(18), 2, 1 }, /* LCD_D_8 */
+ { pinmux(18), 2, 0 }, /* LCD_D_9 */
+ { pinmux(17), 2, 7 }, /* LCD_D_10 */
+ { pinmux(17), 2, 6 }, /* LCD_D_11 */
+ { pinmux(17), 2, 5 }, /* LCD_D_12 */
+ { pinmux(17), 2, 4 }, /* LCD_D_13 */
+ { pinmux(17), 2, 3 }, /* LCD_D_14 */
+ { pinmux(17), 2, 2 }, /* LCD_D_15 */
+ { pinmux(18), 2, 6 }, /* LCD_PCLK */
+ { pinmux(19), 2, 0 }, /* LCD_HSYNC */
+ { pinmux(19), 2, 1 }, /* LCD_VSYNC */
+ { pinmux(19), 2, 6 }, /* DA850_NLCD_AC_ENB_CS */
+};
+
+const struct pinmux_config halten_pin[] = {
+ { pinmux(3), 4, 2 } /* GPIO8[6] HALTEN */
+};
+
static const struct pinmux_resource pinmuxes[] = {
#ifdef CONFIG_SPI_FLASH
PINMUX_ITEM(spi1_pins),
#endif
PINMUX_ITEM(uart_pins),
+ PINMUX_ITEM(i2c_pins),
#ifdef CONFIG_NAND_DAVINCI
PINMUX_ITEM(nand_pins),
#endif
+#ifdef CONFIG_VIDEO
+ PINMUX_ITEM(lcd_pins),
+#endif
};
static const struct lpsc_resource lpsc[] = {
{ DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
{ DAVINCI_LPSC_SPI1 }, /* Serial Flash */
{ DAVINCI_LPSC_EMAC }, /* image download */
- { DAVINCI_LPSC_UART2 }, /* console */
+ { DAVINCI_LPSC_UART0 }, /* console */
{ DAVINCI_LPSC_GPIO },
+ { DAVINCI_LPSC_LCDC }, /* LCD */
};
-int board_init(void)
+int board_early_init_f(void)
{
+ struct davinci_gpio *gpio6_base =
+ (struct davinci_gpio *)DAVINCI_GPIO_BANK67;
+
+ /* PinMux for GPIO */
+ if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
+ return 1;
+
+ /* Set the RESETOUTn low */
+ writel((readl(&gpio6_base->set_data) & ~(1 << 15)),
+ &gpio6_base->set_data);
+ writel((readl(&gpio6_base->dir) & ~(1 << 15)), &gpio6_base->dir);
+
+ /* Set U0_SW0 low for UART0 as console*/
+ writel((readl(&gpio6_base->set_data) & ~(1 << 10)),
+ &gpio6_base->set_data);
+ writel((readl(&gpio6_base->dir) & ~(1 << 10)), &gpio6_base->dir);
+
+ /* Set U0_SW1 low for UART0 as console*/
+ writel((readl(&gpio6_base->set_data) & ~(1 << 12)),
+ &gpio6_base->set_data);
+ writel((readl(&gpio6_base->dir) & ~(1 << 12)), &gpio6_base->dir);
+
+ /* Set LCD_B_PWR low to power down LCD Backlight*/
+ writel((readl(&gpio6_base->set_data) & ~(1 << 6)),
+ &gpio6_base->set_data);
+ writel((readl(&gpio6_base->dir) & ~(1 << 6)), &gpio6_base->dir);
+
+ /* Set DISP_ON low to disable LCD output*/
+ writel((readl(&gpio6_base->set_data) & ~(1 << 1)),
+ &gpio6_base->set_data);
+ writel((readl(&gpio6_base->dir) & ~(1 << 1)), &gpio6_base->dir);
+
#ifndef CONFIG_USE_IRQ
irq_init();
#endif
-
-#ifdef CONFIG_NAND_DAVINCI
/*
* NAND CS setup - cycle counts based on da850evm NAND timings in the
* Linux kernel @ 25MHz EMIFA
*/
+#ifdef CONFIG_NAND_DAVINCI
writel((DAVINCI_ABCR_WSETUP(0) |
- DAVINCI_ABCR_WSTROBE(0) |
+ DAVINCI_ABCR_WSTROBE(1) |
DAVINCI_ABCR_WHOLD(0) |
DAVINCI_ABCR_RSETUP(0) |
DAVINCI_ABCR_RSTROBE(1) |
DAVINCI_ABCR_RHOLD(0) |
DAVINCI_ABCR_TA(0) |
DAVINCI_ABCR_ASIZE_8BIT),
- &davinci_emif_regs->ab2cr); /* CS3 */
+ &davinci_emif_regs->ab1cr); /* CS2 */
#endif
- /* arch number of the board */
- gd->bd->bi_arch_number = MACH_TYPE_EA20;
-
- /* address of boot parameters */
- gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
-
/*
* Power on required peripherals
* ARM does not have access by default to PSC0 and PSC1
@@ -150,7 +239,7 @@ int board_init(void)
writel(readl(&davinci_syscfg_regs->suspsrc) &
~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
- DAVINCI_SYSCFG_SUSPSRC_UART2),
+ DAVINCI_SYSCFG_SUSPSRC_UART0),
&davinci_syscfg_regs->suspsrc);
/* configure pinmux settings */
@@ -167,10 +256,60 @@ int board_init(void)
/* enable the console UART */
writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
DAVINCI_UART_PWREMU_MGMT_UTRST),
- &davinci_uart2_ctrl_regs->pwremu_mgmt);
+ &davinci_uart0_ctrl_regs->pwremu_mgmt);
+
+ /*
+ * Reconfigure the LCDC priority to the highest to ensure that
+ * the throughput/latency requirements for the LCDC are met.
+ */
+ writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff,
+ &davinci_syscfg_regs->mstpri[2]);
+
+ /* Set LCD_B_PWR low to power up LCD Backlight*/
+ writel((readl(&gpio6_base->set_data) | (1 << 6)),
+ &gpio6_base->set_data);
+
+ /* Set DISP_ON low to disable LCD output*/
+ writel((readl(&gpio6_base->set_data) | (1 << 1)),
+ &gpio6_base->set_data);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* arch number of the board */
+ gd->bd->bi_arch_number = MACH_TYPE_EA20;
+
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+ da8xx_video_init(&lcd_panel, 16);
+
+ return 0;
+}
+
+#ifdef BOARD_LATE_INIT
+
+int board_late_init(void)
+{
+ struct davinci_gpio *gpio8_base =
+ (struct davinci_gpio *)DAVINCI_GPIO_BANK8;
+
+ /* PinMux for HALTEN */
+ if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0)
+ return 1;
+
+ /* Set HALTEN to high */
+ writel((readl(&gpio8_base->set_data) | (1 << 6)),
+ &gpio8_base->set_data);
+ writel((readl(&gpio8_base->dir) & ~(1 << 6)), &gpio8_base->dir);
+
+ setenv("stdout", "serial");
return 0;
}
+#endif /* BOARD_LATE_INIT */
#ifdef CONFIG_DRIVER_TI_EMAC