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authorMarek Vasut <marex@denx.de>2020-03-28 02:01:58 +0100
committerPatrice Chotard <patrice.chotard@st.com>2020-04-15 09:08:29 +0200
commitde80a2476a829a9e23ddb60ba87104aeb55d9c6a (patch)
tree6c3f13ab85f6c0f2afb62a9de935f1d5ac666ae9 /board/dhelectronics/dh_stm32mp1
parentcb25126801277a0e73e1a20083a0522739fd44df (diff)
ARM: dts: stm32: Add KS8851-16MLL ethernet on FMC2
Add DT entries, Kconfig entries and board-specific entries to configure FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'board/dhelectronics/dh_stm32mp1')
-rw-r--r--board/dhelectronics/dh_stm32mp1/board.c52
1 files changed, 52 insertions, 0 deletions
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
index 7bcd713a86..a3458a2623 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -375,6 +375,56 @@ static void sysconf_init(void)
#endif
}
+static void board_init_fmc2(void)
+{
+#define STM32_FMC2_BCR1 0x0
+#define STM32_FMC2_BTR1 0x4
+#define STM32_FMC2_BWTR1 0x104
+#define STM32_FMC2_BCR(x) ((x) * 0x8 + STM32_FMC2_BCR1)
+#define STM32_FMC2_BCRx_FMCEN BIT(31)
+#define STM32_FMC2_BCRx_WREN BIT(12)
+#define STM32_FMC2_BCRx_RSVD BIT(7)
+#define STM32_FMC2_BCRx_FACCEN BIT(6)
+#define STM32_FMC2_BCRx_MWID(n) ((n) << 4)
+#define STM32_FMC2_BCRx_MTYP(n) ((n) << 2)
+#define STM32_FMC2_BCRx_MUXEN BIT(1)
+#define STM32_FMC2_BCRx_MBKEN BIT(0)
+#define STM32_FMC2_BTR(x) ((x) * 0x8 + STM32_FMC2_BTR1)
+#define STM32_FMC2_BTRx_DATAHLD(n) ((n) << 30)
+#define STM32_FMC2_BTRx_BUSTURN(n) ((n) << 16)
+#define STM32_FMC2_BTRx_DATAST(n) ((n) << 8)
+#define STM32_FMC2_BTRx_ADDHLD(n) ((n) << 4)
+#define STM32_FMC2_BTRx_ADDSET(n) ((n) << 0)
+
+#define RCC_MP_AHB6RSTCLRR 0x218
+#define RCC_MP_AHB6RSTCLRR_FMCRST BIT(12)
+#define RCC_MP_AHB6ENSETR 0x19c
+#define RCC_MP_AHB6ENSETR_FMCEN BIT(12)
+
+ const u32 bcr = STM32_FMC2_BCRx_WREN |STM32_FMC2_BCRx_RSVD |
+ STM32_FMC2_BCRx_FACCEN | STM32_FMC2_BCRx_MWID(1) |
+ STM32_FMC2_BCRx_MTYP(2) | STM32_FMC2_BCRx_MUXEN |
+ STM32_FMC2_BCRx_MBKEN;
+ const u32 btr = STM32_FMC2_BTRx_DATAHLD(3) |
+ STM32_FMC2_BTRx_BUSTURN(2) |
+ STM32_FMC2_BTRx_DATAST(0x22) |
+ STM32_FMC2_BTRx_ADDHLD(2) |
+ STM32_FMC2_BTRx_ADDSET(2);
+
+ /* Set up FMC2 bus for KS8851-16MLL and X11 SRAM */
+ writel(RCC_MP_AHB6RSTCLRR_FMCRST, STM32_RCC_BASE + RCC_MP_AHB6RSTCLRR);
+ writel(RCC_MP_AHB6ENSETR_FMCEN, STM32_RCC_BASE + RCC_MP_AHB6ENSETR);
+
+ /* KS8851-16MLL -- Muxed mode */
+ writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(1));
+ writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(1));
+ /* AS7C34098 SRAM on X11 -- Muxed mode */
+ writel(bcr, STM32_FMC2_BASE + STM32_FMC2_BCR(3));
+ writel(btr, STM32_FMC2_BASE + STM32_FMC2_BTR(3));
+
+ setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, STM32_FMC2_BCRx_FMCEN);
+}
+
/* board dependent setup after realloc */
int board_init(void)
{
@@ -398,6 +448,8 @@ int board_init(void)
sysconf_init();
+ board_init_fmc2();
+
if (CONFIG_IS_ENABLED(CONFIG_LED))
led_default_state();