diff options
author | Jagan Teki <jagannadh.teki@gmail.com> | 2017-11-21 00:02:16 +0530 |
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committer | Stefano Babic <sbabic@denx.de> | 2017-11-27 10:36:40 +0100 |
commit | 52aaddd6f415397bb2eae0d68a8cc1c5c4a98bb3 (patch) | |
tree | 9370094a6c8c59b0c5fd95cf7619797a3839f43b /board/engicam/geam6ul | |
parent | 539b1e228f0dda602e4b64ccbdf0d338988dec6c (diff) |
i.MX6: engicam: Add imx6q/imx6ul boards for existing boards
Add new board names for existing board support
imx6q - icore and icore_rqs boards
imx6ul - geam6ul and isiot boards
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'board/engicam/geam6ul')
-rw-r--r-- | board/engicam/geam6ul/Kconfig | 12 | ||||
-rw-r--r-- | board/engicam/geam6ul/MAINTAINERS | 8 | ||||
-rw-r--r-- | board/engicam/geam6ul/Makefile | 6 | ||||
-rw-r--r-- | board/engicam/geam6ul/README | 28 | ||||
-rw-r--r-- | board/engicam/geam6ul/geam6ul.c | 90 |
5 files changed, 0 insertions, 144 deletions
diff --git a/board/engicam/geam6ul/Kconfig b/board/engicam/geam6ul/Kconfig deleted file mode 100644 index 7f4023e1ec..0000000000 --- a/board/engicam/geam6ul/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_MX6UL_GEAM - -config SYS_BOARD - default "geam6ul" - -config SYS_VENDOR - default "engicam" - -config SYS_CONFIG_NAME - default "imx6-engicam" - -endif diff --git a/board/engicam/geam6ul/MAINTAINERS b/board/engicam/geam6ul/MAINTAINERS deleted file mode 100644 index 2b882d245a..0000000000 --- a/board/engicam/geam6ul/MAINTAINERS +++ /dev/null @@ -1,8 +0,0 @@ -GEAM6UL BOARD -M: Jagan Teki <jagan@amarulasolutions.com> -S: Maintained -F: board/engicam/geam6ul -F: include/configs/imx6-engicam.h -F: configs/imx6ul_geam_mmc_defconfig -F: configs/imx6ul_geam_nand_defconfig -F: arch/arm/dts/imx6ul-geam-kit.dts diff --git a/board/engicam/geam6ul/Makefile b/board/engicam/geam6ul/Makefile deleted file mode 100644 index 0e367e2172..0000000000 --- a/board/engicam/geam6ul/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright (C) 2016 Amarula Solutions B.V. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := geam6ul.o diff --git a/board/engicam/geam6ul/README b/board/engicam/geam6ul/README deleted file mode 100644 index 0df6ae4a8c..0000000000 --- a/board/engicam/geam6ul/README +++ /dev/null @@ -1,28 +0,0 @@ -How to use U-Boot on Engicam GEAM6UL Starter Kit: -------------------------------------------------- - -- Configure U-Boot for Engicam GEAM6UL: - -$ make mrproper -$ make imx6ul_geam_mmc_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot-dtb.img. - -- Flash the SPL image into the micro SD card: - -sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync - -- Flash the u-boot-dtb.img image into the micro SD card: - -sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync - -- Jumper settings: - -MMC Boot: JM3 Closed - -- Connect the Serial cable between the Starter Kit and the PC for the console. -(J28 is the Linux Serial console connector) - -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. diff --git a/board/engicam/geam6ul/geam6ul.c b/board/engicam/geam6ul/geam6ul.c deleted file mode 100644 index 23e7e4b0b9..0000000000 --- a/board/engicam/geam6ul/geam6ul.c +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * Author: Jagan Teki <jagan@amarulasolutions.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> - -#include <asm/io.h> -#include <asm/gpio.h> -#include <linux/sizes.h> - -#include <asm/arch/clock.h> -#include <asm/arch/crm_regs.h> -#include <asm/arch/iomux.h> -#include <asm/arch/mx6-pins.h> -#include <asm/arch/sys_proto.h> -#include <asm/mach-imx/iomux-v3.h> - -#include "../common/board.h" - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_NAND_MXS - -#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) -#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ - PAD_CTL_SRE_FAST) -#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) - -static iomux_v3_cfg_t const nand_pads[] = { - IOMUX_PADS(PAD_NAND_DATA00__RAWNAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA01__RAWNAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA02__RAWNAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA03__RAWNAND_DATA03 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA04__RAWNAND_DATA04 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA05__RAWNAND_DATA05 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA06__RAWNAND_DATA06 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA07__RAWNAND_DATA07 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CLE__RAWNAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_ALE__RAWNAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CE0_B__RAWNAND_CE0_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_RE_B__RAWNAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WE_B__RAWNAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WP_B__RAWNAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_READY_B__RAWNAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), -}; - -void setup_gpmi_nand(void) -{ - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - - /* config gpmi nand iomux */ - SETUP_IOMUX_PADS(nand_pads); - - clrbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* - * config gpmi and bch clock to 100 MHz - * bch/gpmi select PLL2 PFD2 400M - * 100M = 400M / 4 - */ - clrbits_le32(&mxc_ccm->cscmr1, - MXC_CCM_CSCMR1_BCH_CLK_SEL | - MXC_CCM_CSCMR1_GPMI_CLK_SEL); - clrsetbits_le32(&mxc_ccm->cscdr1, - MXC_CCM_CSCDR1_BCH_PODF_MASK | - MXC_CCM_CSCDR1_GPMI_PODF_MASK, - (3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) | - (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET)); - - /* enable gpmi and bch clock gating */ - setbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* enable apbh clock gating */ - setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); -} -#endif /* CONFIG_NAND_MXS */ |