diff options
| author | Matthias Fuchs <matthias.fuchs@esd-electronics.com> | 2008-01-08 12:49:58 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-01-09 06:32:35 +0100 |
| commit | ff5fb8a6ccba56e3482d0e297d8cfb7faa040811 (patch) | |
| tree | 2d146bc665069702f85eaed07ae932458fa304d1 /board/esd | |
| parent | 7d5d75633174867316a0c0f2fca5ceb2cf312cde (diff) | |
ppc4xx: Update PLB/PCI divider for PMC440 board
This patch updates the PLB/PCI divider when running at
400MHz CPU frequency from 4 to 3 which results in 44MHz PCI sync clock.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Diffstat (limited to 'board/esd')
| -rw-r--r-- | board/esd/pmc440/cmd_pmc440.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c index d588d8ca9b..350af48638 100644 --- a/board/esd/pmc440/cmd_pmc440.c +++ b/board/esd/pmc440/cmd_pmc440.c @@ -280,10 +280,10 @@ int do_setup_bootstrap_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] if (argc > 1) { if (!strcmp(argv[1], "400")) { - /* PLB=133MHz, PLB/PCI=4 */ + /* PLB=133MHz, PLB/PCI=3 */ printf("Bootstrapping for 400MHz\n"); sdsdp[0]=0x8678624e; - sdsdp[1]=0x0947a030; + sdsdp[1]=0x095fa030; sdsdp[2]=0x40082350; sdsdp[3]=0x0d050000; } else if (!strcmp(argv[1], "533")) { |