diff options
| author | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
| commit | f82642e33899766892499b163e60560fbbf87773 (patch) | |
| tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /board/etin/kvme080 | |
| parent | b59b16ca24bc7e77ec113021a6d77b9b32fcf192 (diff) | |
| parent | 360fe71e82b83e264c964c9447c537e9a1f643c8 (diff) | |
Merge 'next' branch
Conflicts:
board/freescale/mpc8536ds/mpc8536ds.c
include/configs/mgcoge.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/etin/kvme080')
| -rw-r--r-- | board/etin/kvme080/kvme080.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/board/etin/kvme080/kvme080.c b/board/etin/kvme080/kvme080.c index be6924d15a..8c6afc9ca7 100644 --- a/board/etin/kvme080/kvme080.c +++ b/board/etin/kvme080/kvme080.c @@ -46,7 +46,7 @@ unsigned long setdram(int m, int row, int col, int bank) CONFIG_READ_WORD(MCCR1, mccr1); mccr1 &= 0xffff0000; - start = CFG_SDRAM_BASE; + start = CONFIG_SYS_SDRAM_BASE; end = start + (1 << (col + row + 3) ) * bank - 1; for (i = 0; i < m; i++) { @@ -101,31 +101,31 @@ phys_size_t initdram(int board_type) msr = mfmsr(); mtmsr(msr & ~(MSR_IR | MSR_DR)); - mtspr(IBAT2L, CFG_IBAT0L + 0x10000000); - mtspr(IBAT2U, CFG_IBAT0U + 0x10000000); - mtspr(DBAT2L, CFG_DBAT0L + 0x10000000); - mtspr(DBAT2U, CFG_DBAT0U + 0x10000000); + mtspr(IBAT2L, CONFIG_SYS_IBAT0L + 0x10000000); + mtspr(IBAT2U, CONFIG_SYS_IBAT0U + 0x10000000); + mtspr(DBAT2L, CONFIG_SYS_DBAT0L + 0x10000000); + mtspr(DBAT2U, CONFIG_SYS_DBAT0U + 0x10000000); mtmsr(msr); - if (setdram(2,13,10,4) == get_ram_size(CFG_SDRAM_BASE, 0x20000000)) + if (setdram(2,13,10,4) == get_ram_size(CONFIG_SYS_SDRAM_BASE, 0x20000000)) size = 0x20000000; /* 512MB */ - else if (setdram(1,13,10,4) == get_ram_size(CFG_SDRAM_BASE, 0x10000000)) + else if (setdram(1,13,10,4) == get_ram_size(CONFIG_SYS_SDRAM_BASE, 0x10000000)) size = 0x10000000; /* 256MB */ - else if (setdram(2,13,9,4) == get_ram_size(CFG_SDRAM_BASE, 0x10000000)) + else if (setdram(2,13,9,4) == get_ram_size(CONFIG_SYS_SDRAM_BASE, 0x10000000)) size = 0x10000000; /* 256MB */ - else if (setdram(1,13,9,4) == get_ram_size(CFG_SDRAM_BASE, 0x08000000)) + else if (setdram(1,13,9,4) == get_ram_size(CONFIG_SYS_SDRAM_BASE, 0x08000000)) size = 0x08000000; /* 128MB */ - else if (setdram(2,12,9,4) == get_ram_size(CFG_SDRAM_BASE, 0x08000000)) + else if (setdram(2,12,9,4) == get_ram_size(CONFIG_SYS_SDRAM_BASE, 0x08000000)) size = 0x08000000; /* 128MB */ - else if (setdram(1,12,9,4) == get_ram_size(CFG_SDRAM_BASE, 0x04000000)) + else if (setdram(1,12,9,4) == get_ram_size(CONFIG_SYS_SDRAM_BASE, 0x04000000)) size = 0x04000000; /* 64MB */ msr = mfmsr(); mtmsr(msr & ~(MSR_IR | MSR_DR)); - mtspr(IBAT2L, CFG_IBAT2L); - mtspr(IBAT2U, CFG_IBAT2U); - mtspr(DBAT2L, CFG_DBAT2L); - mtspr(DBAT2U, CFG_DBAT2U); + mtspr(IBAT2L, CONFIG_SYS_IBAT2L); + mtspr(IBAT2U, CONFIG_SYS_IBAT2U); + mtspr(DBAT2L, CONFIG_SYS_DBAT2L); + mtspr(DBAT2U, CONFIG_SYS_DBAT2U); mtmsr(msr); return size; |