diff options
| author | Zhao Qiang <B45475@freescale.com> | 2013-09-04 10:11:27 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-10-16 16:13:11 -0700 |
| commit | ffee1dde3c4cb2721c56c78e0360affec1c23d3f (patch) | |
| tree | fc87c859def7c217c5caca59a4a9ac3f0eae69bc /board/freescale/b4860qds/eth_b4860qds.c | |
| parent | d56898249c09f8264fc398dd209c293116a293c9 (diff) | |
SGMII:fix PHY addresses for QSGMII Riser Card working in SGMII mode
Fix PHY addresses for QSGMII Riser Card working in
SGMII mode on board P3041/P5020/P4080/P5040/B4860.
QSGMII Riser Card can work in SGMII mode, but
having the different PHY addresses.
So the following steps should be done:
1. Confirm whether QSGMII Riser Card is used.
2. If yes, set the proper PHY address.
Generally, the function is_qsgmii_riser_card() is
for step 1, and set_sgmii_phy() for step 2.
However, there are still some special situations,
take P5040 and B4860 as examples, the PHY addresses
need to be changed when serdes protocol is changed,
so it is necessary to confirm the protocol before
setting PHY addresses.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Diffstat (limited to 'board/freescale/b4860qds/eth_b4860qds.c')
| -rw-r--r-- | board/freescale/b4860qds/eth_b4860qds.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/board/freescale/b4860qds/eth_b4860qds.c b/board/freescale/b4860qds/eth_b4860qds.c index dc4ef80fc8..a8fc845193 100644 --- a/board/freescale/b4860qds/eth_b4860qds.c +++ b/board/freescale/b4860qds/eth_b4860qds.c @@ -150,6 +150,8 @@ int board_eth_init(bd_t *bis) struct memac_mdio_info tg_memac_mdio_info; unsigned int i; unsigned int serdes1_prtcl, serdes2_prtcl; + int qsgmii; + struct mii_dev *bus; ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); serdes1_prtcl = in_be32(&gur->rcwsr[4]) & FSL_CORENET2_RCWSR4_SRDS1_PRTCL; @@ -281,6 +283,22 @@ int board_eth_init(bd_t *bis) break; } + /*set PHY address for QSGMII Riser Card on slot2*/ + bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); + qsgmii = is_qsgmii_riser_card(bus, PHY_BASE_ADDR, PORT_NUM, REGNUM); + + if (qsgmii) { + switch (serdes2_prtcl) { + case 0xb2: + case 0x8d: + fm_info_set_phy_address(FM1_DTSEC3, PHY_BASE_ADDR); + fm_info_set_phy_address(FM1_DTSEC4, PHY_BASE_ADDR + 1); + break; + default: + break; + } + } + for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) { int idx = i - FM1_DTSEC1; |