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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-05-11 00:06:03 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-05-11 00:06:03 +0200 |
| commit | e825b100d209a9d3c79b2998452cafa94eec986a (patch) | |
| tree | e1654c4d745839eba8d37f67d15acde79382e23e /board/freescale/b4860qds | |
| parent | b03b25caea1ff3a501161f5bc1ad5e5b5b124e0c (diff) | |
| parent | 66a62ce0dc48d2319938c72f34a562f519c5d5c2 (diff) | |
Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'
Diffstat (limited to 'board/freescale/b4860qds')
| -rw-r--r-- | board/freescale/b4860qds/tlb.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/board/freescale/b4860qds/tlb.c b/board/freescale/b4860qds/tlb.c index 373cb7848c..6d634bf690 100644 --- a/board/freescale/b4860qds/tlb.c +++ b/board/freescale/b4860qds/tlb.c @@ -111,8 +111,6 @@ struct fsl_e_tlb_entry tlb_table[] = { #ifdef CONFIG_SYS_NAND_BASE /* * *I*G - NAND - * entry 14 and 15 has been used hard coded, they will be disabled - * in cpu_init_f, so we use entry 16 for nand. */ SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, @@ -122,6 +120,23 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 12, BOOKE_PAGESZ_4K, 1), + /* + * *I*G - SRIO + * entry 14 and 15 has been used hard coded, they will be disabled + * in cpu_init_f, so we use entry 16 for SRIO2. + */ +#ifdef CONFIG_SYS_SRIO1_MEM_PHYS + /* *I*G* - SRIO1 */ + SET_TLB_ENTRY(1, CONFIG_SYS_SRIO1_MEM_VIRT, CONFIG_SYS_SRIO1_MEM_PHYS, + MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 13, BOOKE_PAGESZ_256M, 1), +#endif +#ifdef CONFIG_SYS_SRIO2_MEM_PHYS + /* *I*G* - SRIO2 */ + SET_TLB_ENTRY(1, CONFIG_SYS_SRIO2_MEM_VIRT, CONFIG_SYS_SRIO2_MEM_PHYS, + MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 16, BOOKE_PAGESZ_256M, 1), +#endif }; int num_tlb_entries = ARRAY_SIZE(tlb_table); |