diff options
| author | Wolfgang Denk <wd@denx.de> | 2013-10-04 17:43:24 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-10-14 16:06:54 -0400 |
| commit | 93e1459641e758d2b096d3f1b39414a39bb314f8 (patch) | |
| tree | 3780156a164d3924a2412354872203e4b46f8592 /board/freescale/bsc9132qds/README | |
| parent | 3765b3e7bd0f8e46914d417f29cbcb0c72b1acf7 (diff) | |
Coding Style cleanup: replace leading SPACEs by TABs
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Drop changes for PEP 4 following python tools]
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board/freescale/bsc9132qds/README')
| -rw-r--r-- | board/freescale/bsc9132qds/README | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/board/freescale/bsc9132qds/README b/board/freescale/bsc9132qds/README index 4a3dbfe5d4..f8377c9aa4 100644 --- a/board/freescale/bsc9132qds/README +++ b/board/freescale/bsc9132qds/README @@ -23,14 +23,14 @@ Overview ECC), up to 1333 MHz data rate - Dedicated security engine featuring trusted boot - Two DMA controllers - - OCNDMA with four bidirectional channels - - SysDMA with sixteen bidirectional channels + - OCNDMA with four bidirectional channels + - SysDMA with sixteen bidirectional channels - Interfaces - - Four-lane SerDes PHY + - Four-lane SerDes PHY - PCI Express controller complies with the PEX Specification-Rev 2.0 - - Two Common Public Radio Interface (CPRI) controller lanes + - Two Common Public Radio Interface (CPRI) controller lanes - High-speed USB 2.0 host and device controller with ULPI interface - - Enhanced secure digital (SD/MMC) host controller (eSDHC) + - Enhanced secure digital (SD/MMC) host controller (eSDHC) - Antenna interface controller (AIC), supporting four industry standard JESD207/four custom ADI RF interfaces - ADI lanes support both full duplex FDD support & half duplex TDD |