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authorTom Rini <trini@konsulko.com>2019-11-11 14:19:04 -0500
committerTom Rini <trini@konsulko.com>2019-11-11 14:19:04 -0500
commit0b73ef0c02313e651af4b0a8e206c7c4a198e7f8 (patch)
tree6e84ad48ccdb4b02b3a272ec30e7967426c15e13 /board/freescale/common/p_corenet/tlb.c
parenta4b7485e2f311b1319b1b9cd59f5666536e24a28 (diff)
parentbef18454044e62800ece687b8d50ddd853117660 (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC. - Few bug fixes and updates related to SPI, hwconfig, ethernet, fsl-layerscape, pci, icid, PSCI
Diffstat (limited to 'board/freescale/common/p_corenet/tlb.c')
-rw-r--r--board/freescale/common/p_corenet/tlb.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/common/p_corenet/tlb.c b/board/freescale/common/p_corenet/tlb.c
index 3d9459b133..c0ab1a5fd1 100644
--- a/board/freescale/common/p_corenet/tlb.c
+++ b/board/freescale/common/p_corenet/tlb.c
@@ -43,7 +43,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
/* *I*** - Covers boot page */
#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR)
-#if !defined(CONFIG_SECURE_BOOT)
+#if !defined(CONFIG_NXP_ESBC)
/*
* *I*G - L3SRAM. When L3 is used as 1M SRAM, the address of the
* SRAM is at 0xfff00000, it covered the 0xfffff000.