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authorTang Yuantian <Yuantian.Tang@freescale.com>2015-04-20 11:16:56 +0800
committerYork Sun <yorksun@freescale.com>2015-05-04 09:25:06 -0700
commit1a56fcea9f47ce9184f4dafd3e856de2d85d47cd (patch)
tree29e6e1e5e306b9d8563c80eb146d2803098ed47c /board/freescale/common
parent438031e1bc0a733f9494f2cb954725cd79543e1e (diff)
fsl/deepsleep: avoid the DDR restore from being optimized out
Function dp_ddr_restore is to restore the first 128-byte space of DDR. However those codes may be optimized out by compiler since the destination address is at 0x0. In order to avoid compiler optimization, we restore the space from high address, which is not at 0x0, to low address. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/common')
-rw-r--r--board/freescale/common/mpc85xx_sleep.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/board/freescale/common/mpc85xx_sleep.c b/board/freescale/common/mpc85xx_sleep.c
index 9e4132c64e..e9cbd515a1 100644
--- a/board/freescale/common/mpc85xx_sleep.c
+++ b/board/freescale/common/mpc85xx_sleep.c
@@ -43,16 +43,16 @@ void fsl_dp_disable_console(void)
*/
static void dp_ddr_restore(void)
{
- volatile u64 *src, *dst;
+ u64 *src, *dst;
int i;
struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
/* get the address of ddr date from SPARECR3 */
- src = (u64 *)in_be32(&scfg->sparecr[2]);
- dst = (u64 *)CONFIG_SYS_SDRAM_BASE;
+ src = (u64 *)(in_be32(&scfg->sparecr[2]) + DDR_BUFF_LEN - 8);
+ dst = (u64 *)(CONFIG_SYS_SDRAM_BASE + DDR_BUFF_LEN - 8);
for (i = 0; i < DDR_BUFF_LEN / 8; i++)
- *dst++ = *src++;
+ *dst-- = *src--;
flush_dcache();
}