diff options
author | Peng Fan <peng.fan@nxp.com> | 2019-10-22 03:30:04 +0000 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2019-11-05 10:27:18 +0100 |
commit | bdcf3a88cc582ce8bb9ea024fa917d9a52e05479 (patch) | |
tree | 63315feb47ea62c7d2d890c6cf85c23bf84c81ab /board/freescale/imx8mm_evk/imx8mm_evk.c | |
parent | 673f6597321d0e1b27a99fb7758a338a6b915318 (diff) |
imx: imx8mm-evk: enable ethernet
add phy-reset-gpios to reset phy
Add board_phy_config to configure phy
Enable DM_ETH
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'board/freescale/imx8mm_evk/imx8mm_evk.c')
-rw-r--r-- | board/freescale/imx8mm_evk/imx8mm_evk.c | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/board/freescale/imx8mm_evk/imx8mm_evk.c b/board/freescale/imx8mm_evk/imx8mm_evk.c index e4742338e3..a0af550f5e 100644 --- a/board/freescale/imx8mm_evk/imx8mm_evk.c +++ b/board/freescale/imx8mm_evk/imx8mm_evk.c @@ -4,6 +4,11 @@ */ #include <common.h> +#include <miiphy.h> +#include <netdev.h> + +#include <asm/arch/clock.h> +#include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; @@ -14,8 +19,40 @@ int dram_init(void) return 0; } +#if IS_ENABLED(CONFIG_FEC_MXC) +static int setup_fec(void) +{ + struct iomuxc_gpr_base_regs *gpr = + (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + + /* Use 125M anatop REF_CLK1 for ENET1, not from external */ + clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + /* enable rgmii rxc skew and phy mode select to RGMII copper */ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); + + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); + + if (phydev->drv->config) + phydev->drv->config(phydev); + return 0; +} +#endif + int board_init(void) { + if (IS_ENABLED(CONFIG_FEC_MXC)) + setup_fec(); + return 0; } |