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authorAlison Wang <alison.wang@nxp.com>2019-03-06 14:49:14 +0800
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>2019-03-15 11:52:01 +0530
commit158097052a6a528408e05d2345ff2ccdbb46036e (patch)
tree78453d3d716aef5368b91a620203c0487fe6f378 /board/freescale/ls1021aqds/ddr.c
parentba7eadd8e107202ab90d0b2937044b6dcba4b7ae (diff)
armv7: ls102xa: Add workaround for DDR erratum A-008850
Barrier transactions from CCI400 need to be disabled till the DDR is configured, otherwise it may lead to system hang. The patch adds workaround to fix the erratum. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'board/freescale/ls1021aqds/ddr.c')
-rw-r--r--board/freescale/ls1021aqds/ddr.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c
index 98faf9389e..d3e2e53321 100644
--- a/board/freescale/ls1021aqds/ddr.c
+++ b/board/freescale/ls1021aqds/ddr.c
@@ -179,6 +179,8 @@ int fsl_initdram(void)
fsl_dp_resume();
#endif
+ erratum_a008850_post();
+
gd->ram_size = dram_size;
return 0;