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authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>2016-08-02 19:03:27 +0800
committerYork Sun <york.sun@nxp.com>2016-09-14 14:07:13 -0700
commitb392a6d4b05b7409283cd75b4ac6bd12018d187a (patch)
tree272b0b5b8780f23ed8fc102d09c97d94c9dbe7e6 /board/freescale/ls1021aqds
parent664b6520582fcea7e150f57258c7a63627837318 (diff)
fsl-layerscape: Add workaround for PCIe erratum A010315
As the access to serders protocol unselected PCIe controller will hang. So disable the R/W permission to unselected PCIe controller including its CCSR, IO space and memory space according to the serders protocol field of RCW. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1021aqds')
-rw-r--r--board/freescale/ls1021aqds/ls1021aqds.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 291b0f4c72..4eb38a73c9 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -430,6 +430,10 @@ int board_init(void)
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
unsigned int major;
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+ erratum_a010315();
+#endif
+
major = get_soc_major_rev();
if (major == SOC_MAJOR_VER_1_0) {
/* Set CCI-400 control override register to